When resuming from s2ram, firmware may re-enable x2apic mode, which may have
been disabled by the kernel during boot either because it doesn't support
irq remapping or for other reasons. This causes the kernel to continue using
the xapic interface, while the hardware is in x2apic mode, which causes hangs.
This happens on defconfig + bare metal + s2ram.
Fix this in lapic_resume() by disabling x2apic if the kernel expects it to be
disabled, i.e. when x2apic_mode = 0.
The ACPI v6.6 spec, Section 16.3 [1] says firmware restores either the pre-sleep
configuration or initial boot configuration for each CPU, including MSR state:
When executing from the power-on reset vector as a result of waking
from an S2 or S3 sleep state, the platform firmware performs only the
hardware initialization required to restore the system to either the
state the platform was in prior to the initial operating system boot,
or to the pre-sleep configuration state. In multiprocessor systems,
non-boot processors should be placed in the same state as prior to the
initial operating system boot.
(further ahead)
If this is an S2 or S3 wake, then the platform runtime firmware
restores minimum context of the system before jumping to the waking
vector. This includes:
CPU configuration. Platform runtime firmware restores the
pre-sleep configuration or initial boot configuration of each
CPU (MSR, MTRR, firmware update, SMBase, and so on). Interrupts
must be disabled (for IA-32 processors, disabled by CLI
instruction).
(and other things)
So at least as per the spec, re-enablement of x2apic by the firmware is allowed
if "x2apic on" is a part of the initial boot configuration.
[1] https://uefi.org/specs/ACPI/6.6/16_Waking_and_Sleeping.html#initialization
Fixes: 6e1cb38a2aef ("x64, x2apic/intr-remap: add x2apic support, including enabling interrupt-remapping")
Cc: stable@vger.kernel.org
Co-developed-by: Rahul Bukte <rahul.bukte@sony.com>
Signed-off-by: Rahul Bukte <rahul.bukte@sony.com>
Signed-off-by: Shashank Balaji <shashank.mahadasyam@sony.com>
---
Changes in v2:
- Add __x2apic_disable() stub for !CONFIG_X86_X2APIC
- Mention the ACPI spec in the commit message (Sohil Mehta)
---
arch/x86/kernel/apic/apic.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index d93f87f29d03..c8cb82d5131c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1894,6 +1894,7 @@ void __init check_x2apic(void)
static inline void try_to_enable_x2apic(int remap_mode) { }
static inline void __x2apic_enable(void) { }
+static inline void __x2apic_disable(void) { }
#endif /* !CONFIG_X86_X2APIC */
void __init enable_IR_x2apic(void)
@@ -2456,6 +2457,15 @@ static void lapic_resume(void *data)
if (x2apic_mode) {
__x2apic_enable();
} else {
+ /*
+ * x2apic may have been re-enabled by the firmware on resuming
+ * from s2ram
+ */
+ if (x2apic_enabled()) {
+ pr_warn_once("x2apic: re-enabled by firmware during resume. Disabling\n");
+ __x2apic_disable();
+ }
+
/*
* Make sure the APICBASE points to the right address
*
--
2.43.0On 3/5/2026 9:46 PM, Shashank Balaji wrote:
> So at least as per the spec, re-enablement of x2apic by the firmware is allowed
> if "x2apic on" is a part of the initial boot configuration.
>
The code changes look fine to me. I am still a bit uncertain about the
"x2apic on" BIOS option. I hope the firmware provides more description
to the user about what it does.
Anyway,
Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>
> @@ -2456,6 +2457,15 @@ static void lapic_resume(void *data)
> if (x2apic_mode) {
> __x2apic_enable();
> } else {
> + /*
> + * x2apic may have been re-enabled by the firmware on resuming
> + * from s2ram
> + */
This comment is mostly unnecessary because the pr_warn conveys the same
message.
> + if (x2apic_enabled()) {
> + pr_warn_once("x2apic: re-enabled by firmware during resume. Disabling\n");
> + __x2apic_disable();
> + }
> +
On Fri, Mar 06 2026 at 14:46, Shashank Balaji wrote:
> When resuming from s2ram, firmware may re-enable x2apic mode, which may have
> been disabled by the kernel during boot either because it doesn't support
> irq remapping or for other reasons. This causes the kernel to continue using
> the xapic interface, while the hardware is in x2apic mode, which causes hangs.
> This happens on defconfig + bare metal + s2ram.
>
> Fix this in lapic_resume() by disabling x2apic if the kernel expects it to be
> disabled, i.e. when x2apic_mode = 0.
>
> The ACPI v6.6 spec, Section 16.3 [1] says firmware restores either the pre-sleep
> configuration or initial boot configuration for each CPU, including MSR state:
>
> When executing from the power-on reset vector as a result of waking
> from an S2 or S3 sleep state, the platform firmware performs only the
> hardware initialization required to restore the system to either the
> state the platform was in prior to the initial operating system boot,
> or to the pre-sleep configuration state. In multiprocessor systems,
> non-boot processors should be placed in the same state as prior to the
> initial operating system boot.
>
> (further ahead)
>
> If this is an S2 or S3 wake, then the platform runtime firmware
> restores minimum context of the system before jumping to the waking
> vector. This includes:
>
> CPU configuration. Platform runtime firmware restores the
> pre-sleep configuration or initial boot configuration of each
> CPU (MSR, MTRR, firmware update, SMBase, and so on). Interrupts
> must be disabled (for IA-32 processors, disabled by CLI
> instruction).
>
> (and other things)
>
> So at least as per the spec, re-enablement of x2apic by the firmware is allowed
> if "x2apic on" is a part of the initial boot configuration.
>
> [1] https://uefi.org/specs/ACPI/6.6/16_Waking_and_Sleeping.html#initialization
>
> Fixes: 6e1cb38a2aef ("x64, x2apic/intr-remap: add x2apic support, including enabling interrupt-remapping")
> Cc: stable@vger.kernel.org
> Co-developed-by: Rahul Bukte <rahul.bukte@sony.com>
> Signed-off-by: Rahul Bukte <rahul.bukte@sony.com>
> Signed-off-by: Shashank Balaji <shashank.mahadasyam@sony.com>
Reviewed-by: Thomas Gleixner <tglx@kernel.org>
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 8cc7dd77a1466f0ec58c03478b2e735a5b289b96
Gitweb: https://git.kernel.org/tip/8cc7dd77a1466f0ec58c03478b2e735a5b289b96
Author: Shashank Balaji <shashank.mahadasyam@sony.com>
AuthorDate: Fri, 06 Mar 2026 14:46:28 +09:00
Committer: Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Tue, 10 Mar 2026 11:57:56 +01:00
x86/apic: Disable x2apic on resume if the kernel expects so
When resuming from s2ram, firmware may re-enable x2apic mode, which may have
been disabled by the kernel during boot either because it doesn't support IRQ
remapping or for other reasons. This causes the kernel to continue using the
xapic interface, while the hardware is in x2apic mode, which causes hangs.
This happens on defconfig + bare metal + s2ram.
Fix this in lapic_resume() by disabling x2apic if the kernel expects it to be
disabled, i.e. when x2apic_mode = 0.
The ACPI v6.6 spec, Section 16.3 [1] says firmware restores either the
pre-sleep configuration or initial boot configuration for each CPU, including
MSR state:
When executing from the power-on reset vector as a result of waking from an
S2 or S3 sleep state, the platform firmware performs only the hardware
initialization required to restore the system to either the state the
platform was in prior to the initial operating system boot, or to the
pre-sleep configuration state. In multiprocessor systems, non-boot
processors should be placed in the same state as prior to the initial
operating system boot.
(further ahead)
If this is an S2 or S3 wake, then the platform runtime firmware restores
minimum context of the system before jumping to the waking vector. This
includes:
CPU configuration. Platform runtime firmware restores the pre-sleep
configuration or initial boot configuration of each CPU (MSR, MTRR,
firmware update, SMBase, and so on). Interrupts must be disabled (for
IA-32 processors, disabled by CLI instruction).
(and other things)
So at least as per the spec, re-enablement of x2apic by the firmware is
allowed if "x2apic on" is a part of the initial boot configuration.
[1] https://uefi.org/specs/ACPI/6.6/16_Waking_and_Sleeping.html#initialization
[ bp: Massage. ]
Fixes: 6e1cb38a2aef ("x64, x2apic/intr-remap: add x2apic support, including enabling interrupt-remapping")
Co-developed-by: Rahul Bukte <rahul.bukte@sony.com>
Signed-off-by: Rahul Bukte <rahul.bukte@sony.com>
Signed-off-by: Shashank Balaji <shashank.mahadasyam@sony.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260306-x2apic-fix-v2-1-bee99c12efa3@sony.com
---
arch/x86/kernel/apic/apic.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index d93f87f..961714e 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1894,6 +1894,7 @@ void __init check_x2apic(void)
static inline void try_to_enable_x2apic(int remap_mode) { }
static inline void __x2apic_enable(void) { }
+static inline void __x2apic_disable(void) { }
#endif /* !CONFIG_X86_X2APIC */
void __init enable_IR_x2apic(void)
@@ -2456,6 +2457,11 @@ static void lapic_resume(void *data)
if (x2apic_mode) {
__x2apic_enable();
} else {
+ if (x2apic_enabled()) {
+ pr_warn_once("x2apic: re-enabled by firmware during resume. Disabling\n");
+ __x2apic_disable();
+ }
+
/*
* Make sure the APICBASE points to the right address
*© 2016 - 2026 Red Hat, Inc.