On Fri Mar 6, 2026 at 1:52 PM JST, Alexandre Courbot wrote:
> There is no member in `FalconUCodeDescV3` to describe the start offsets
> of the IMEM and DMEM section in the firmware object. Add comments to
> justify how they are computed.
>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
> drivers/gpu/nova-core/firmware.rs | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firmware.rs
> index 677e1dac6d9f..c2b24906fb7e 100644
> --- a/drivers/gpu/nova-core/firmware.rs
> +++ b/drivers/gpu/nova-core/firmware.rs
> @@ -260,6 +260,7 @@ fn signature_versions(&self) -> u16 {
>
> fn imem_sec_load_params(&self) -> FalconDmaLoadTarget {
> FalconDmaLoadTarget {
> + // IMEM segment always starts at offset 0.
> src_start: 0,
> dst_start: self.imem_phys_base,
> len: self.imem_load_size,
> @@ -273,6 +274,7 @@ fn imem_ns_load_params(&self) -> Option<FalconDmaLoadTarget> {
>
> fn dmem_load_params(&self) -> FalconDmaLoadTarget {
> FalconDmaLoadTarget {
> + // DMEM segment starts right after the IMEM one.
> src_start: self.imem_load_size,
> dst_start: self.dmem_phys_base,
> len: self.dmem_load_size,
Reviewed-by: Eliot Courtney <ecourtney@nvidia.com>