X1P42100 video clock controller has most clocks same as SM8650,
but it also has few additional clocks and resets. Extend the
SM8650 video clock controller bindings to include these additional
clocks and resets for X1P42100 platform.
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
---
Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 2 ++
include/dt-bindings/clock/qcom,sm8650-videocc.h | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..e8bf3fcad3fabc4f3b7e8e692c6c634d1aed9605 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
@@ -30,6 +30,7 @@ properties:
- qcom,sm8650-videocc
- qcom,sm8750-videocc
- qcom,x1e80100-videocc
+ - qcom,x1p42100-videocc
clocks:
items:
@@ -67,6 +68,7 @@ allOf:
- qcom,sm8450-videocc
- qcom,sm8550-videocc
- qcom,sm8750-videocc
+ - qcom,x1p42100-videocc
then:
required:
- required-opps
diff --git a/include/dt-bindings/clock/qcom,sm8650-videocc.h b/include/dt-bindings/clock/qcom,sm8650-videocc.h
index 4e3c2d87280fb9a37cbc52330e31b0710ab63144..ba2d231e9dc8718bdcc07f994577cf68413dc273 100644
--- a/include/dt-bindings/clock/qcom,sm8650-videocc.h
+++ b/include/dt-bindings/clock/qcom,sm8650-videocc.h
@@ -16,8 +16,14 @@
#define VIDEO_CC_MVS1_SHIFT_CLK 14
#define VIDEO_CC_MVS1C_SHIFT_CLK 15
#define VIDEO_CC_XO_CLK_SRC 16
+/* X1P42100 introduces below new clocks compared to SM8650 */
+#define VIDEO_CC_MVS0_BSE_CLK 17
+#define VIDEO_CC_MVS0_BSE_CLK_SRC 18
+#define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC 19
/* VIDEO_CC resets */
#define VIDEO_CC_XO_CLK_ARES 7
+/* X1P42100 introduces below new reset compared to SM8650 */
+#define VIDEO_CC_MVS0_BSE_BCR 8
#endif
--
2.34.1
On Wed, Mar 04, 2026 at 11:10:51PM +0530, Jagadeesh Kona wrote: > X1P42100 video clock controller has most clocks same as SM8650, > but it also has few additional clocks and resets. Extend the > SM8650 video clock controller bindings to include these additional > clocks and resets for X1P42100 platform. > > Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> > --- > Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 2 ++ > include/dt-bindings/clock/qcom,sm8650-videocc.h | 6 ++++++ > 2 files changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..e8bf3fcad3fabc4f3b7e8e692c6c634d1aed9605 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > @@ -30,6 +30,7 @@ properties: > - qcom,sm8650-videocc > - qcom,sm8750-videocc > - qcom,x1e80100-videocc > + - qcom,x1p42100-videocc > > clocks: > items: > @@ -67,6 +68,7 @@ allOf: > - qcom,sm8450-videocc > - qcom,sm8550-videocc > - qcom,sm8750-videocc > + - qcom,x1p42100-videocc > then: > required: > - required-opps > diff --git a/include/dt-bindings/clock/qcom,sm8650-videocc.h b/include/dt-bindings/clock/qcom,sm8650-videocc.h > index 4e3c2d87280fb9a37cbc52330e31b0710ab63144..ba2d231e9dc8718bdcc07f994577cf68413dc273 100644 > --- a/include/dt-bindings/clock/qcom,sm8650-videocc.h > +++ b/include/dt-bindings/clock/qcom,sm8650-videocc.h > @@ -16,8 +16,14 @@ > #define VIDEO_CC_MVS1_SHIFT_CLK 14 > #define VIDEO_CC_MVS1C_SHIFT_CLK 15 > #define VIDEO_CC_XO_CLK_SRC 16 > +/* X1P42100 introduces below new clocks compared to SM8650 */ I don't understand why X1P42100 was added to SM8650. Last time I asked you not to include other header, thus solution is to add full list of clocks. This is completely wrong because you do not have the same driver! Best regards, Krzysztof
On 3/5/2026 1:17 PM, Krzysztof Kozlowski wrote: > On Wed, Mar 04, 2026 at 11:10:51PM +0530, Jagadeesh Kona wrote: >> X1P42100 video clock controller has most clocks same as SM8650, >> but it also has few additional clocks and resets. Extend the >> SM8650 video clock controller bindings to include these additional >> clocks and resets for X1P42100 platform. >> >> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> >> --- >> Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 2 ++ >> include/dt-bindings/clock/qcom,sm8650-videocc.h | 6 ++++++ >> 2 files changed, 8 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..e8bf3fcad3fabc4f3b7e8e692c6c634d1aed9605 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> @@ -30,6 +30,7 @@ properties: >> - qcom,sm8650-videocc >> - qcom,sm8750-videocc >> - qcom,x1e80100-videocc >> + - qcom,x1p42100-videocc >> >> clocks: >> items: >> @@ -67,6 +68,7 @@ allOf: >> - qcom,sm8450-videocc >> - qcom,sm8550-videocc >> - qcom,sm8750-videocc >> + - qcom,x1p42100-videocc >> then: >> required: >> - required-opps >> diff --git a/include/dt-bindings/clock/qcom,sm8650-videocc.h b/include/dt-bindings/clock/qcom,sm8650-videocc.h >> index 4e3c2d87280fb9a37cbc52330e31b0710ab63144..ba2d231e9dc8718bdcc07f994577cf68413dc273 100644 >> --- a/include/dt-bindings/clock/qcom,sm8650-videocc.h >> +++ b/include/dt-bindings/clock/qcom,sm8650-videocc.h >> @@ -16,8 +16,14 @@ >> #define VIDEO_CC_MVS1_SHIFT_CLK 14 >> #define VIDEO_CC_MVS1C_SHIFT_CLK 15 >> #define VIDEO_CC_XO_CLK_SRC 16 >> +/* X1P42100 introduces below new clocks compared to SM8650 */ > > I don't understand why X1P42100 was added to SM8650. Last time I asked > you not to include other header, thus solution is to add full list of > clocks. > > This is completely wrong because you do not have the same driver! > Sorry, I misinterpreted and thought it can be added in same header file. I will create a separate header with full list of clocks for X1P42100 in next series. Thanks, Jagadeesh
© 2016 - 2026 Red Hat, Inc.