From: Zhi Li <lizhi2@eswincomputing.com>
The second Ethernet controller (eth1) on the Eswin EIC7700 SoC may fail
to sample RX data correctly at Gigabit speed due to EIC7700-specific
receive clock to data skew at the MAC input in the silicon.
The existing internal delay configuration does not provide sufficient
adjustment range to compensate for this condition at 1000Mbps.
Update the EIC7700 DWMAC glue driver to apply EIC7700-specific clock
sampling inversion only during Gigabit operation on MAC instances
that require it.
TXD and RXD delay registers are explicitly cleared during initialization
to override any residual configuration left by the bootloader. All HSP
CSR register accesses are performed only after the required clocks are
enabled.
Fixes: ea77dbbdbc4e ("net: stmmac: add Eswin EIC7700 glue driver")
Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
---
.../ethernet/stmicro/stmmac/dwmac-eic7700.c | 180 +++++++++++++-----
1 file changed, 137 insertions(+), 43 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
index bcb8e000e720..acddea58cc6b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
@@ -28,20 +28,40 @@
/*
* TX/RX Clock Delay Bit Masks:
- * - TX Delay: bits [14:8] — TX_CLK delay (unit: 0.1ns per bit)
- * - RX Delay: bits [30:24] — RX_CLK delay (unit: 0.1ns per bit)
+ * - TX Delay: bits [14:8] — TX_CLK delay (unit: 0.02ns per bit)
+ * - TX Invert : bit [15]
+ * - RX Delay: bits [30:24] — RX_CLK delay (unit: 0.02ns per bit)
+ * - RX Invert : bit [31]
*/
#define EIC7700_ETH_TX_ADJ_DELAY GENMASK(14, 8)
#define EIC7700_ETH_RX_ADJ_DELAY GENMASK(30, 24)
+#define EIC7700_ETH_TX_INV_DELAY BIT(15)
+#define EIC7700_ETH_RX_INV_DELAY BIT(31)
-#define EIC7700_MAX_DELAY_UNIT 0x7F
+#define EIC7700_MAX_DELAY_STEPS 0x7F
+#define EIC7700_DELAY_STEP_PS 20
+#define EIC7700_MAX_DELAY_PS \
+ (EIC7700_MAX_DELAY_STEPS * EIC7700_DELAY_STEP_PS)
static const char * const eic7700_clk_names[] = {
"tx", "axi", "cfg",
};
+struct eic7700_dwmac_data {
+ bool rgmii_rx_clk_invert;
+};
+
struct eic7700_qos_priv {
+ struct device *dev;
struct plat_stmmacenet_data *plat_dat;
+ struct regmap *eic7700_hsp_regmap;
+ u32 eth_axi_lp_ctrl_offset;
+ u32 eth_phy_ctrl_offset;
+ u32 eth_txd_offset;
+ u32 eth_clk_offset;
+ u32 eth_rxd_offset;
+ u32 eth_clk_dly_param;
+ bool eth_rx_clk_inv;
};
static int eic7700_clks_config(void *priv, bool enabled)
@@ -61,8 +81,26 @@ static int eic7700_clks_config(void *priv, bool enabled)
static int eic7700_dwmac_init(struct device *dev, void *priv)
{
struct eic7700_qos_priv *dwc = priv;
+ int ret;
+
+ ret = eic7700_clks_config(dwc, true);
+ if (ret)
+ return ret;
+
+ ret = regmap_set_bits(dwc->eic7700_hsp_regmap,
+ dwc->eth_phy_ctrl_offset,
+ EIC7700_ETH_TX_CLK_SEL |
+ EIC7700_ETH_PHY_INTF_SELI);
+ if (ret)
+ return ret;
+
+ regmap_write(dwc->eic7700_hsp_regmap, dwc->eth_axi_lp_ctrl_offset,
+ EIC7700_ETH_CSYSREQ_VAL);
- return eic7700_clks_config(dwc, true);
+ regmap_write(dwc->eic7700_hsp_regmap, dwc->eth_txd_offset, 0);
+ regmap_write(dwc->eic7700_hsp_regmap, dwc->eth_rxd_offset, 0);
+
+ return 0;
}
static void eic7700_dwmac_exit(struct device *dev, void *priv)
@@ -88,18 +126,34 @@ static int eic7700_dwmac_resume(struct device *dev, void *priv)
return ret;
}
+static void eic7700_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
+{
+ struct eic7700_qos_priv *dwc = (struct eic7700_qos_priv *)priv;
+ u32 dly_param = dwc->eth_clk_dly_param;
+
+ switch (speed) {
+ case SPEED_1000:
+ if (dwc->eth_rx_clk_inv)
+ dly_param |= EIC7700_ETH_RX_INV_DELAY;
+ break;
+ case SPEED_100:
+ case SPEED_10:
+ break;
+ default:
+ dev_err(dwc->dev, "invalid speed %u\n", speed);
+ break;
+ }
+
+ regmap_write(dwc->eic7700_hsp_regmap, dwc->eth_clk_offset, dly_param);
+}
+
static int eic7700_dwmac_probe(struct platform_device *pdev)
{
+ const struct eic7700_dwmac_data *data;
struct plat_stmmacenet_data *plat_dat;
struct stmmac_resources stmmac_res;
struct eic7700_qos_priv *dwc_priv;
- struct regmap *eic7700_hsp_regmap;
- u32 eth_axi_lp_ctrl_offset;
- u32 eth_phy_ctrl_offset;
- u32 eth_phy_ctrl_regset;
- u32 eth_rxd_dly_offset;
- u32 eth_dly_param = 0;
- u32 delay_ps;
+ u32 delay_ps, val;
int i, ret;
ret = stmmac_get_platform_resources(pdev, &stmmac_res);
@@ -116,70 +170,95 @@ static int eic7700_dwmac_probe(struct platform_device *pdev)
if (!dwc_priv)
return -ENOMEM;
+ dwc_priv->dev = &pdev->dev;
+
+ data = device_get_match_data(&pdev->dev);
+ if (!data)
+ return dev_err_probe(&pdev->dev,
+ -EINVAL, "no match data found\n");
+
+ dwc_priv->eth_rx_clk_inv = data->rgmii_rx_clk_invert;
+
/* Read rx-internal-delay-ps and update rx_clk delay */
if (!of_property_read_u32(pdev->dev.of_node,
"rx-internal-delay-ps", &delay_ps)) {
- u32 val = min(delay_ps / 100, EIC7700_MAX_DELAY_UNIT);
+ if (delay_ps % EIC7700_DELAY_STEP_PS)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "rx delay must be multiple of %dps\n",
+ EIC7700_DELAY_STEP_PS);
- eth_dly_param &= ~EIC7700_ETH_RX_ADJ_DELAY;
- eth_dly_param |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);
- } else {
- return dev_err_probe(&pdev->dev, -EINVAL,
- "missing required property rx-internal-delay-ps\n");
+ if (delay_ps > EIC7700_MAX_DELAY_PS)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "rx delay out of range\n");
+
+ val = delay_ps / EIC7700_DELAY_STEP_PS;
+
+ dwc_priv->eth_clk_dly_param &= ~EIC7700_ETH_RX_ADJ_DELAY;
+ dwc_priv->eth_clk_dly_param |=
+ FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);
}
/* Read tx-internal-delay-ps and update tx_clk delay */
if (!of_property_read_u32(pdev->dev.of_node,
"tx-internal-delay-ps", &delay_ps)) {
- u32 val = min(delay_ps / 100, EIC7700_MAX_DELAY_UNIT);
+ if (delay_ps % EIC7700_DELAY_STEP_PS)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "tx delay must be multiple of %dps\n",
+ EIC7700_DELAY_STEP_PS);
+
+ if (delay_ps > EIC7700_MAX_DELAY_PS)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "tx delay out of range\n");
- eth_dly_param &= ~EIC7700_ETH_TX_ADJ_DELAY;
- eth_dly_param |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);
- } else {
- return dev_err_probe(&pdev->dev, -EINVAL,
- "missing required property tx-internal-delay-ps\n");
+ val = delay_ps / EIC7700_DELAY_STEP_PS;
+
+ dwc_priv->eth_clk_dly_param &= ~EIC7700_ETH_TX_ADJ_DELAY;
+ dwc_priv->eth_clk_dly_param |=
+ FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);
}
- eic7700_hsp_regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
- "eswin,hsp-sp-csr");
- if (IS_ERR(eic7700_hsp_regmap))
+ dwc_priv->eic7700_hsp_regmap =
+ syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+ "eswin,hsp-sp-csr");
+ if (IS_ERR(dwc_priv->eic7700_hsp_regmap))
return dev_err_probe(&pdev->dev,
- PTR_ERR(eic7700_hsp_regmap),
+ PTR_ERR(dwc_priv->eic7700_hsp_regmap),
"Failed to get hsp-sp-csr regmap\n");
ret = of_property_read_u32_index(pdev->dev.of_node,
"eswin,hsp-sp-csr",
- 1, ð_phy_ctrl_offset);
+ 1, &dwc_priv->eth_phy_ctrl_offset);
if (ret)
return dev_err_probe(&pdev->dev, ret,
"can't get eth_phy_ctrl_offset\n");
- regmap_read(eic7700_hsp_regmap, eth_phy_ctrl_offset,
- ð_phy_ctrl_regset);
- eth_phy_ctrl_regset |=
- (EIC7700_ETH_TX_CLK_SEL | EIC7700_ETH_PHY_INTF_SELI);
- regmap_write(eic7700_hsp_regmap, eth_phy_ctrl_offset,
- eth_phy_ctrl_regset);
-
ret = of_property_read_u32_index(pdev->dev.of_node,
"eswin,hsp-sp-csr",
- 2, ð_axi_lp_ctrl_offset);
+ 2, &dwc_priv->eth_axi_lp_ctrl_offset);
if (ret)
return dev_err_probe(&pdev->dev, ret,
"can't get eth_axi_lp_ctrl_offset\n");
- regmap_write(eic7700_hsp_regmap, eth_axi_lp_ctrl_offset,
- EIC7700_ETH_CSYSREQ_VAL);
+ ret = of_property_read_u32_index(pdev->dev.of_node,
+ "eswin,hsp-sp-csr",
+ 3, &dwc_priv->eth_txd_offset);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "can't get eth_txd_offset\n");
ret = of_property_read_u32_index(pdev->dev.of_node,
"eswin,hsp-sp-csr",
- 3, ð_rxd_dly_offset);
+ 4, &dwc_priv->eth_clk_offset);
if (ret)
return dev_err_probe(&pdev->dev, ret,
- "can't get eth_rxd_dly_offset\n");
+ "can't get eth_clk_offset\n");
- regmap_write(eic7700_hsp_regmap, eth_rxd_dly_offset,
- eth_dly_param);
+ ret = of_property_read_u32_index(pdev->dev.of_node,
+ "eswin,hsp-sp-csr",
+ 5, &dwc_priv->eth_rxd_offset);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "can't get eth_rxd_offset\n");
plat_dat->num_clks = ARRAY_SIZE(eic7700_clk_names);
plat_dat->clks = devm_kcalloc(&pdev->dev,
@@ -208,12 +287,27 @@ static int eic7700_dwmac_probe(struct platform_device *pdev)
plat_dat->exit = eic7700_dwmac_exit;
plat_dat->suspend = eic7700_dwmac_suspend;
plat_dat->resume = eic7700_dwmac_resume;
+ plat_dat->fix_mac_speed = eic7700_dwmac_fix_speed;
return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);
}
+static const struct eic7700_dwmac_data eic7700_dwmac_data = {
+ .rgmii_rx_clk_invert = false,
+};
+
+static const struct eic7700_dwmac_data eic7700_dwmac_data_clk_inversion = {
+ .rgmii_rx_clk_invert = true,
+};
+
static const struct of_device_id eic7700_dwmac_match[] = {
- { .compatible = "eswin,eic7700-qos-eth" },
+ { .compatible = "eswin,eic7700-qos-eth",
+ .data = &eic7700_dwmac_data,
+ },
+ {
+ .compatible = "eswin,eic7700-qos-eth-clk-inversion",
+ .data = &eic7700_dwmac_data_clk_inversion,
+ },
{ }
};
MODULE_DEVICE_TABLE(of, eic7700_dwmac_match);
--
2.25.1
Hi,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/lizhi2-eswincomputing-com/dt-bindings-ethernet-eswin-add-clock-sampling-control/20260303-142311
base: net-next/main
patch link: https://lore.kernel.org/r/20260303061711.895-1-lizhi2%40eswincomputing.com
patch subject: [PATCH net-next v3 2/3] net: stmmac: eic7700: enable clocks before syscon access and correct RX sampling timing
config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20260305/202603051549.4Mb0ZZjM-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260305/202603051549.4Mb0ZZjM-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202603051549.4Mb0ZZjM-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:290:26: error: incompatible function pointer types assigning to 'void (*)(void *, phy_interface_t, int, unsigned int)' from 'void (void *, int, unsigned int)' [-Wincompatible-function-pointer-types]
290 | plat_dat->fix_mac_speed = eic7700_dwmac_fix_speed;
| ^ ~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
vim +290 drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
149
150 static int eic7700_dwmac_probe(struct platform_device *pdev)
151 {
152 const struct eic7700_dwmac_data *data;
153 struct plat_stmmacenet_data *plat_dat;
154 struct stmmac_resources stmmac_res;
155 struct eic7700_qos_priv *dwc_priv;
156 u32 delay_ps, val;
157 int i, ret;
158
159 ret = stmmac_get_platform_resources(pdev, &stmmac_res);
160 if (ret)
161 return dev_err_probe(&pdev->dev, ret,
162 "failed to get resources\n");
163
164 plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
165 if (IS_ERR(plat_dat))
166 return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat),
167 "dt configuration failed\n");
168
169 dwc_priv = devm_kzalloc(&pdev->dev, sizeof(*dwc_priv), GFP_KERNEL);
170 if (!dwc_priv)
171 return -ENOMEM;
172
173 dwc_priv->dev = &pdev->dev;
174
175 data = device_get_match_data(&pdev->dev);
176 if (!data)
177 return dev_err_probe(&pdev->dev,
178 -EINVAL, "no match data found\n");
179
180 dwc_priv->eth_rx_clk_inv = data->rgmii_rx_clk_invert;
181
182 /* Read rx-internal-delay-ps and update rx_clk delay */
183 if (!of_property_read_u32(pdev->dev.of_node,
184 "rx-internal-delay-ps", &delay_ps)) {
185 if (delay_ps % EIC7700_DELAY_STEP_PS)
186 return dev_err_probe(&pdev->dev, -EINVAL,
187 "rx delay must be multiple of %dps\n",
188 EIC7700_DELAY_STEP_PS);
189
190 if (delay_ps > EIC7700_MAX_DELAY_PS)
191 return dev_err_probe(&pdev->dev, -EINVAL,
192 "rx delay out of range\n");
193
194 val = delay_ps / EIC7700_DELAY_STEP_PS;
195
196 dwc_priv->eth_clk_dly_param &= ~EIC7700_ETH_RX_ADJ_DELAY;
197 dwc_priv->eth_clk_dly_param |=
198 FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);
199 }
200
201 /* Read tx-internal-delay-ps and update tx_clk delay */
202 if (!of_property_read_u32(pdev->dev.of_node,
203 "tx-internal-delay-ps", &delay_ps)) {
204 if (delay_ps % EIC7700_DELAY_STEP_PS)
205 return dev_err_probe(&pdev->dev, -EINVAL,
206 "tx delay must be multiple of %dps\n",
207 EIC7700_DELAY_STEP_PS);
208
209 if (delay_ps > EIC7700_MAX_DELAY_PS)
210 return dev_err_probe(&pdev->dev, -EINVAL,
211 "tx delay out of range\n");
212
213 val = delay_ps / EIC7700_DELAY_STEP_PS;
214
215 dwc_priv->eth_clk_dly_param &= ~EIC7700_ETH_TX_ADJ_DELAY;
216 dwc_priv->eth_clk_dly_param |=
217 FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);
218 }
219
220 dwc_priv->eic7700_hsp_regmap =
221 syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
222 "eswin,hsp-sp-csr");
223 if (IS_ERR(dwc_priv->eic7700_hsp_regmap))
224 return dev_err_probe(&pdev->dev,
225 PTR_ERR(dwc_priv->eic7700_hsp_regmap),
226 "Failed to get hsp-sp-csr regmap\n");
227
228 ret = of_property_read_u32_index(pdev->dev.of_node,
229 "eswin,hsp-sp-csr",
230 1, &dwc_priv->eth_phy_ctrl_offset);
231 if (ret)
232 return dev_err_probe(&pdev->dev, ret,
233 "can't get eth_phy_ctrl_offset\n");
234
235 ret = of_property_read_u32_index(pdev->dev.of_node,
236 "eswin,hsp-sp-csr",
237 2, &dwc_priv->eth_axi_lp_ctrl_offset);
238 if (ret)
239 return dev_err_probe(&pdev->dev, ret,
240 "can't get eth_axi_lp_ctrl_offset\n");
241
242 ret = of_property_read_u32_index(pdev->dev.of_node,
243 "eswin,hsp-sp-csr",
244 3, &dwc_priv->eth_txd_offset);
245 if (ret)
246 return dev_err_probe(&pdev->dev, ret,
247 "can't get eth_txd_offset\n");
248
249 ret = of_property_read_u32_index(pdev->dev.of_node,
250 "eswin,hsp-sp-csr",
251 4, &dwc_priv->eth_clk_offset);
252 if (ret)
253 return dev_err_probe(&pdev->dev, ret,
254 "can't get eth_clk_offset\n");
255
256 ret = of_property_read_u32_index(pdev->dev.of_node,
257 "eswin,hsp-sp-csr",
258 5, &dwc_priv->eth_rxd_offset);
259 if (ret)
260 return dev_err_probe(&pdev->dev, ret,
261 "can't get eth_rxd_offset\n");
262
263 plat_dat->num_clks = ARRAY_SIZE(eic7700_clk_names);
264 plat_dat->clks = devm_kcalloc(&pdev->dev,
265 plat_dat->num_clks,
266 sizeof(*plat_dat->clks),
267 GFP_KERNEL);
268 if (!plat_dat->clks)
269 return -ENOMEM;
270
271 for (i = 0; i < ARRAY_SIZE(eic7700_clk_names); i++)
272 plat_dat->clks[i].id = eic7700_clk_names[i];
273
274 ret = devm_clk_bulk_get_optional(&pdev->dev,
275 plat_dat->num_clks,
276 plat_dat->clks);
277 if (ret)
278 return dev_err_probe(&pdev->dev, ret,
279 "Failed to get clocks\n");
280
281 plat_dat->clk_tx_i = stmmac_pltfr_find_clk(plat_dat, "tx");
282 plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;
283 plat_dat->clks_config = eic7700_clks_config;
284 plat_dat->bsp_priv = dwc_priv;
285 dwc_priv->plat_dat = plat_dat;
286 plat_dat->init = eic7700_dwmac_init;
287 plat_dat->exit = eic7700_dwmac_exit;
288 plat_dat->suspend = eic7700_dwmac_suspend;
289 plat_dat->resume = eic7700_dwmac_resume;
> 290 plat_dat->fix_mac_speed = eic7700_dwmac_fix_speed;
291
292 return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);
293 }
294
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Hi,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/lizhi2-eswincomputing-com/dt-bindings-ethernet-eswin-add-clock-sampling-control/20260303-142311
base: net-next/main
patch link: https://lore.kernel.org/r/20260303061711.895-1-lizhi2%40eswincomputing.com
patch subject: [PATCH net-next v3 2/3] net: stmmac: eic7700: enable clocks before syscon access and correct RX sampling timing
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20260305/202603051555.5m64TOiy-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260305/202603051555.5m64TOiy-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202603051555.5m64TOiy-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c: In function 'eic7700_dwmac_probe':
>> drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:290:33: error: assignment to 'void (*)(void *, phy_interface_t, int, unsigned int)' from incompatible pointer type 'void (*)(void *, int, unsigned int)' [-Wincompatible-pointer-types]
290 | plat_dat->fix_mac_speed = eic7700_dwmac_fix_speed;
| ^
drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:129:13: note: 'eic7700_dwmac_fix_speed' declared here
129 | static void eic7700_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
| ^~~~~~~~~~~~~~~~~~~~~~~
vim +290 drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
149
150 static int eic7700_dwmac_probe(struct platform_device *pdev)
151 {
152 const struct eic7700_dwmac_data *data;
153 struct plat_stmmacenet_data *plat_dat;
154 struct stmmac_resources stmmac_res;
155 struct eic7700_qos_priv *dwc_priv;
156 u32 delay_ps, val;
157 int i, ret;
158
159 ret = stmmac_get_platform_resources(pdev, &stmmac_res);
160 if (ret)
161 return dev_err_probe(&pdev->dev, ret,
162 "failed to get resources\n");
163
164 plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
165 if (IS_ERR(plat_dat))
166 return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat),
167 "dt configuration failed\n");
168
169 dwc_priv = devm_kzalloc(&pdev->dev, sizeof(*dwc_priv), GFP_KERNEL);
170 if (!dwc_priv)
171 return -ENOMEM;
172
173 dwc_priv->dev = &pdev->dev;
174
175 data = device_get_match_data(&pdev->dev);
176 if (!data)
177 return dev_err_probe(&pdev->dev,
178 -EINVAL, "no match data found\n");
179
180 dwc_priv->eth_rx_clk_inv = data->rgmii_rx_clk_invert;
181
182 /* Read rx-internal-delay-ps and update rx_clk delay */
183 if (!of_property_read_u32(pdev->dev.of_node,
184 "rx-internal-delay-ps", &delay_ps)) {
185 if (delay_ps % EIC7700_DELAY_STEP_PS)
186 return dev_err_probe(&pdev->dev, -EINVAL,
187 "rx delay must be multiple of %dps\n",
188 EIC7700_DELAY_STEP_PS);
189
190 if (delay_ps > EIC7700_MAX_DELAY_PS)
191 return dev_err_probe(&pdev->dev, -EINVAL,
192 "rx delay out of range\n");
193
194 val = delay_ps / EIC7700_DELAY_STEP_PS;
195
196 dwc_priv->eth_clk_dly_param &= ~EIC7700_ETH_RX_ADJ_DELAY;
197 dwc_priv->eth_clk_dly_param |=
198 FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);
199 }
200
201 /* Read tx-internal-delay-ps and update tx_clk delay */
202 if (!of_property_read_u32(pdev->dev.of_node,
203 "tx-internal-delay-ps", &delay_ps)) {
204 if (delay_ps % EIC7700_DELAY_STEP_PS)
205 return dev_err_probe(&pdev->dev, -EINVAL,
206 "tx delay must be multiple of %dps\n",
207 EIC7700_DELAY_STEP_PS);
208
209 if (delay_ps > EIC7700_MAX_DELAY_PS)
210 return dev_err_probe(&pdev->dev, -EINVAL,
211 "tx delay out of range\n");
212
213 val = delay_ps / EIC7700_DELAY_STEP_PS;
214
215 dwc_priv->eth_clk_dly_param &= ~EIC7700_ETH_TX_ADJ_DELAY;
216 dwc_priv->eth_clk_dly_param |=
217 FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);
218 }
219
220 dwc_priv->eic7700_hsp_regmap =
221 syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
222 "eswin,hsp-sp-csr");
223 if (IS_ERR(dwc_priv->eic7700_hsp_regmap))
224 return dev_err_probe(&pdev->dev,
225 PTR_ERR(dwc_priv->eic7700_hsp_regmap),
226 "Failed to get hsp-sp-csr regmap\n");
227
228 ret = of_property_read_u32_index(pdev->dev.of_node,
229 "eswin,hsp-sp-csr",
230 1, &dwc_priv->eth_phy_ctrl_offset);
231 if (ret)
232 return dev_err_probe(&pdev->dev, ret,
233 "can't get eth_phy_ctrl_offset\n");
234
235 ret = of_property_read_u32_index(pdev->dev.of_node,
236 "eswin,hsp-sp-csr",
237 2, &dwc_priv->eth_axi_lp_ctrl_offset);
238 if (ret)
239 return dev_err_probe(&pdev->dev, ret,
240 "can't get eth_axi_lp_ctrl_offset\n");
241
242 ret = of_property_read_u32_index(pdev->dev.of_node,
243 "eswin,hsp-sp-csr",
244 3, &dwc_priv->eth_txd_offset);
245 if (ret)
246 return dev_err_probe(&pdev->dev, ret,
247 "can't get eth_txd_offset\n");
248
249 ret = of_property_read_u32_index(pdev->dev.of_node,
250 "eswin,hsp-sp-csr",
251 4, &dwc_priv->eth_clk_offset);
252 if (ret)
253 return dev_err_probe(&pdev->dev, ret,
254 "can't get eth_clk_offset\n");
255
256 ret = of_property_read_u32_index(pdev->dev.of_node,
257 "eswin,hsp-sp-csr",
258 5, &dwc_priv->eth_rxd_offset);
259 if (ret)
260 return dev_err_probe(&pdev->dev, ret,
261 "can't get eth_rxd_offset\n");
262
263 plat_dat->num_clks = ARRAY_SIZE(eic7700_clk_names);
264 plat_dat->clks = devm_kcalloc(&pdev->dev,
265 plat_dat->num_clks,
266 sizeof(*plat_dat->clks),
267 GFP_KERNEL);
268 if (!plat_dat->clks)
269 return -ENOMEM;
270
271 for (i = 0; i < ARRAY_SIZE(eic7700_clk_names); i++)
272 plat_dat->clks[i].id = eic7700_clk_names[i];
273
274 ret = devm_clk_bulk_get_optional(&pdev->dev,
275 plat_dat->num_clks,
276 plat_dat->clks);
277 if (ret)
278 return dev_err_probe(&pdev->dev, ret,
279 "Failed to get clocks\n");
280
281 plat_dat->clk_tx_i = stmmac_pltfr_find_clk(plat_dat, "tx");
282 plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;
283 plat_dat->clks_config = eic7700_clks_config;
284 plat_dat->bsp_priv = dwc_priv;
285 dwc_priv->plat_dat = plat_dat;
286 plat_dat->init = eic7700_dwmac_init;
287 plat_dat->exit = eic7700_dwmac_exit;
288 plat_dat->suspend = eic7700_dwmac_suspend;
289 plat_dat->resume = eic7700_dwmac_resume;
> 290 plat_dat->fix_mac_speed = eic7700_dwmac_fix_speed;
291
292 return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);
293 }
294
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
On Tue, 3 Mar 2026 14:17:08 +0800 lizhi2@eswincomputing.com wrote:
> .../ethernet/stmicro/stmmac/dwmac-eic7700.c | 180 +++++++++++++-----
> 1 file changed, 137 insertions(+), 43 deletions(-)
../drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:290:33: error: assignment to ‘void (*)(void *, phy_interface_t, int, unsigned int)’ from incompatible pointer type ‘void (*)(void *, int, unsigned int)’ [-Wincompatible-pointer-types]
290 | plat_dat->fix_mac_speed = eic7700_dwmac_fix_speed;
| ^
../drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:129:13: note: ‘eic7700_dwmac_fix_speed’ declared here
129 | static void eic7700_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
| ^~~~~~~~~~~~~~~~~~~~~~~
--
pw-bot: cr
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