Hi,

This series extends the versaclock3 driver to support registering multiple
devices at the same time, and adds support for the internal freerunning
32.768 kHz clock. The 32k clock is used on the Renesas RZ/V2H SoC as RTC
counter clock.

The dts nodes for the RZ/V2H EVK was updated to describe the versa3
devices found on the boards.

Best regards,
Ovidiu

v4:
- Used the I2C device name to make the clock names unique, instaed of the
  dts node name.
- Dropped the RZ/V2N dts patch from this series, as the latest RZ/V2N EVK
  board revision (v2) does not connect the versa3 chip to the I2C bus
  anymore. The PCIe and audio cloks will be added when support for those
  respective interfaces is added.

v3: https://lore.kernel.org/all/20260203135139.28151-1-ovidiu.panait.rb@renesas.com/
- Fixed a NULL pointer dereference on the error paths.
- Added support for registering multiple versa3 instances at the same time.
- Made clock names unique by prefixing them with the DT node name.
- Rebased the internal 32k clock patch to match the new logic.
- Added comments in RZ/V2H and RZ/V2N board dts to document rtxin_clk and
  qextal_clk routing.

v2: https://lore.kernel.org/all/20260120150606.7356-1-ovidiu.panait.rb@renesas.com/
- Added versaclock3 dts node for RZ/V2N EVK.

v1: https://lore.kernel.org/all/20251021175311.19611-1-ovidiu.panait.rb@renesas.com/

Ovidiu Panait (7):
  clk: versaclock3: Fix NULL pointer dereference in error path
  clk: versaclock3: Remove unused SE2 clock select macro
  clk: versaclock3: Reference parent clocks by type and index
  clk: versaclock3: Add per-device clock data structure
  clk: versaclock3: Prefix clock names with device name
  clk: versaclock3: Add freerunning 32.768kHz clock support
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add versa3 clock
    generator node

 .../dts/renesas/r9a09g057h44-rzv2h-evk.dts    |  25 +
 drivers/clk/clk-versaclock3.c                 | 618 +++++++++++++-----
 2 files changed, 481 insertions(+), 162 deletions(-)

-- 
2.51.0