On 01/03/2026 00:51, David Heidelberg via B4 Relay wrote:
> From: David Heidelberg <david@ixit.cz>
>
> Read PHY configuration from the device-tree bus-type and save it into
> the csiphy structure for later use.
>
> For C-PHY, skip clock line configuration, as there is none.
>
> Signed-off-by: David Heidelberg <david@ixit.cz>
> ---
> drivers/media/platform/qcom/camss/camss-csiphy.h | 2 ++
> drivers/media/platform/qcom/camss/camss.c | 18 +++++++++++-------
> 2 files changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h
> index 2d5054819df7f..d198171700e73 100644
> --- a/drivers/media/platform/qcom/camss/camss-csiphy.h
> +++ b/drivers/media/platform/qcom/camss/camss-csiphy.h
> @@ -28,11 +28,13 @@ struct csiphy_lane {
>
> /**
> * struct csiphy_lanes_cfg - CSIPHY lanes configuration
> + * @phy_cfg: interface selection (C-PHY or D-PHY)
> * @num_data: number of data lanes
> * @data: data lanes configuration
> * @clk: clock lane configuration (only for D-PHY)
> */
> struct csiphy_lanes_cfg {
> + enum v4l2_mbus_type phy_cfg;
> int num_data;
> struct csiphy_lane *data;
> struct csiphy_lane clk;
> diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
> index 00b87fd9afbd8..ea0c8cf3cd806 100644
> --- a/drivers/media/platform/qcom/camss/camss.c
> +++ b/drivers/media/platform/qcom/camss/camss.c
> @@ -4411,11 +4411,11 @@ static int camss_parse_endpoint_node(struct device *dev,
> if (ret)
> return ret;
>
> - /*
> - * Most SoCs support both D-PHY and C-PHY standards, but currently only
> - * D-PHY is supported in the driver.
> - */
> - if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
> + switch (vep.bus_type) {
> + case V4L2_MBUS_CSI2_CPHY:
> + case V4L2_MBUS_CSI2_DPHY:
> + break;
> + default:
> dev_err(dev, "Unsupported bus type %d\n", vep.bus_type);
> return -EINVAL;
> }
> @@ -4423,9 +4423,13 @@ static int camss_parse_endpoint_node(struct device *dev,
> csd->interface.csiphy_id = vep.base.port;
>
> mipi_csi2 = &vep.bus.mipi_csi2;
> - lncfg->clk.pos = mipi_csi2->clock_lane;
> - lncfg->clk.pol = mipi_csi2->lane_polarities[0];
> lncfg->num_data = mipi_csi2->num_data_lanes;
> + lncfg->phy_cfg = vep.bus_type;
> +
> + if (lncfg->phy_cfg != V4L2_MBUS_CSI2_CPHY) {
> + lncfg->clk.pos = mipi_csi2->clock_lane;
> + lncfg->clk.pol = mipi_csi2->lane_polarities[0];
> + }
>
> lncfg->data = devm_kcalloc(dev,
> lncfg->num_data, sizeof(*lncfg->data),
>
This patch should come last in the series - i.e. it should be invalid to
select CPHY mode until all of the other code has advanced to accommodate.
I guess you end up depending on this variable a little later on.
I think this patch looks good with the one caveat that I'd like
bisectability here.
So perhaps take the switch statement and have that part be a last patch
at the end formally enabling CPHY mode.
---
bod