[PATCH] MAINTAINERS: Add myself as a reviewer for RISC-V TCG CPUs

Chao Liu posted 1 patch 1 month, 1 week ago
There is a newer version of this series
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
[PATCH] MAINTAINERS: Add myself as a reviewer for RISC-V TCG CPUs
Posted by Chao Liu 1 month, 1 week ago
Add myself as a reviewer for RISC-V TCG CPU related code to better
participate in patch review.

Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 233d2a5e71..4923715c9c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -333,6 +333,7 @@ M: Alistair Francis <alistair.francis@wdc.com>
 R: Weiwei Li <liwei1518@gmail.com>
 R: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
 R: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
+R: Chao Liu <chao.liu.zevorn@gmail.com>
 L: qemu-riscv@nongnu.org
 S: Supported
 F: configs/targets/riscv*
-- 
2.53.0
Re: [PATCH] MAINTAINERS: Add myself as a reviewer for RISC-V TCG CPUs
Posted by Alistair Francis 1 month, 1 week ago
On Thu, Feb 26, 2026 at 8:20 PM Chao Liu <chao.liu.zevorn@gmail.com> wrote:
>
> Add myself as a reviewer for RISC-V TCG CPU related code to better
> participate in patch review.
>
> Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 233d2a5e71..4923715c9c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -333,6 +333,7 @@ M: Alistair Francis <alistair.francis@wdc.com>
>  R: Weiwei Li <liwei1518@gmail.com>
>  R: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
>  R: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
> +R: Chao Liu <chao.liu.zevorn@gmail.com>
>  L: qemu-riscv@nongnu.org
>  S: Supported
>  F: configs/targets/riscv*
> --
> 2.53.0
>
>
Re: [PATCH] MAINTAINERS: Add myself as a reviewer for RISC-V TCG CPUs
Posted by LIU Zhiwei 1 month, 1 week ago

On 2/26/26 6:20 PM, Chao Liu wrote:
> Add myself as a reviewer for RISC-V TCG CPU related code to better
> participate in patch review.
>
> Signed-off-by: Chao Liu<chao.liu.zevorn@gmail.com>
> ---
>   MAINTAINERS | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 233d2a5e71..4923715c9c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -333,6 +333,7 @@ M: Alistair Francis<alistair.francis@wdc.com>
>   R: Weiwei Li<liwei1518@gmail.com>
>   R: Daniel Henrique Barboza<dbarboza@ventanamicro.com>
>   R: Liu Zhiwei<zhiwei_liu@linux.alibaba.com>
> +R: Chao Liu<chao.liu.zevorn@gmail.com>

Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>

Zhiwei

>   L:qemu-riscv@nongnu.org
>   S: Supported
>   F: configs/targets/riscv*
Re: [PATCH] MAINTAINERS: Add myself as a reviewer for RISC-V TCG CPUs
Posted by Daniel Henrique Barboza 1 month, 1 week ago

On 2/26/2026 7:20 AM, Chao Liu wrote:
> Add myself as a reviewer for RISC-V TCG CPU related code to better
> participate in patch review.
> 
> Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
> ---

Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>


>   MAINTAINERS | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 233d2a5e71..4923715c9c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -333,6 +333,7 @@ M: Alistair Francis <alistair.francis@wdc.com>
>   R: Weiwei Li <liwei1518@gmail.com>
>   R: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
>   R: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
> +R: Chao Liu <chao.liu.zevorn@gmail.com>
>   L: qemu-riscv@nongnu.org
>   S: Supported
>   F: configs/targets/riscv*
Re: [PATCH] MAINTAINERS: Add myself as a reviewer for RISC-V TCG CPUs
Posted by Bin Meng 1 month, 1 week ago
Hi Chao,

On Thu, Feb 26, 2026 at 6:20 PM Chao Liu <chao.liu.zevorn@gmail.com> wrote:
>
> Add myself as a reviewer for RISC-V TCG CPU related code to better
> participate in patch review.
>
> Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
>

It's great to see you stepping up to become one of the reviewers for
the RISC-V subsystem. You have been doing an excellent job
contributing new features and fixing bugs here for the past one year.
I'm confident that this subsystem is in good hands with you.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Regards,
Bin