Hi Bryan,
On Wed, 2026-02-25 at 15:11 +0000, Bryan O'Donoghue wrote:
> Define ov08x40 on cci1_i2c1. The RGB sensor appears on the AON CCI pins
> connected to CSIPHY4 in four lane mode.
>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
> arch/arm64/boot/dts/qcom/x1-crd.dtsi | 76 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 76 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
> index c89f5ad0aed56..d47404c71b80b 100644
> --- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
> @@ -6,6 +6,7 @@
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/input/gpio-keys.h>
> #include <dt-bindings/input/input.h>
> +#include <dt-bindings/phy/phy.h>
> #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>
> @@ -901,6 +902,65 @@ &gpu {
> status = "okay";
> };
>
> +&camss {
> + status = "okay";
> +
> + ports {
> + /*
> + * port0 => csiphy0
> + * port1 => csiphy1
> + * port2 => csiphy2
> + * port3 => csiphy4
> + */
> + port@3 {
> + camss_csiphy4_inep0: endpoint@0 {
> + clock-lanes = <7>;
> + data-lanes = <0 1 2 3>;
> + remote-endpoint = <&ov08x40_ep>;
> + };
> + };
> + };
> +};
> +
> +&cci1 {
> + status = "okay";
> +};
> +
> +&cci1_i2c1 {
> + camera@36 {
> + compatible = "ovti,ov08x40";
> + reg = <0x36>;
> +
> + reset-gpios = <&tlmm 237 GPIO_ACTIVE_LOW>;
> + pinctrl-0 = <&cam_rgb_default>;
> + pinctrl-names = "default";
> +
> + clocks = <&camcc CAM_CC_MCLK4_CLK>;
> + assigned-clocks = <&camcc CAM_CC_MCLK4_CLK>;
> + assigned-clock-rates = <19200000>;
> +
> + orientation = <0>; /* front facing */
> +
> + avdd-supply = <&vreg_l7b_2p8>;
> + dovdd-supply = <&vreg_l3m_1p8>;
> +
> + port {
> + ov08x40_ep: endpoint {
> + data-lanes = <1 2 3 4>;
> + link-frequencies = /bits/ 64 <400000000>;
> + remote-endpoint = <&camss_csiphy4_inep0>;
> + };
> + };
> + };
> +};
> +
> +&csiphy4 {
> + vdda-0p8-supply = <&vreg_l2c_0p8>;
> + vdda-1p2-supply = <&vreg_l1c_1p2>;
> +
> + status = "okay";
> +};
> +
> &i2c0 {
> clock-frequency = <400000>;
>
> @@ -1515,6 +1575,22 @@ &tlmm {
> <44 4>, /* SPI (TPM) */
> <238 1>; /* UFS Reset */
>
> + cam_rgb_default: cam-rgb-default-state {
> + mclk-pins {
> + pins = "gpio100";
> + function = "cam_aon";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +
> + reset-n-pins {
> + pins = "gpio237";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> edp_reg_en: edp-reg-en-state {
> pins = "gpio70";
> function = "gpio";