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[PATCH v3 1/2] PCI: dwc: ep: Fix MSI-X configuration to write to correct physical function

Aksh Garg posted 2 patches 1 month, 1 week ago
[PATCH v3 1/2] PCI: dwc: ep: Fix MSI-X configuration to write to correct physical function
Posted by Aksh Garg 1 month, 1 week ago 
The MSI-X configuration code reads from the correct physical function's
register space using dw_pcie_ep_readw_dbi(), but writes back only to
PF0 using the old dw_pcie_writew_dbi() helper. This causes incorrect
MSI-X configuration for other PFs.

Fix this by using dw_pcie_ep_writew_dbi() to write to the correct PF's
register space, matching the read operation.

Fixes: 70fa02ca1446 ("PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers")
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Aksh Garg <a-garg7@ti.com>
---

Changes since v1:
- None

v1: https://lore.kernel.org/all/20260202072758.101845-2-a-garg7@ti.com/

 drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 7e7844ff0f7e..771241e1a2c9 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -745,7 +745,7 @@ static int dw_pcie_ep_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 	val = dw_pcie_ep_readw_dbi(ep, func_no, reg);
 	val &= ~PCI_MSIX_FLAGS_QSIZE;
 	val |= nr_irqs - 1; /* encoded as N-1 */
-	dw_pcie_writew_dbi(pci, reg, val);
+	dw_pcie_ep_writew_dbi(ep, func_no, reg, val);
 
 	reg = ep_func->msix_cap + PCI_MSIX_TABLE;
 	val = offset | bir;
-- 
2.34.1
Re: [PATCH v3 1/2] PCI: dwc: ep: Fix MSI-X configuration to write to correct physical function
Posted by Bjorn Helgaas 3 weeks, 5 days ago 
On Tue, Feb 24, 2026 at 02:08:16PM +0530, Aksh Garg wrote:
> The MSI-X configuration code reads from the correct physical function's
> register space using dw_pcie_ep_readw_dbi(), but writes back only to
> PF0 using the old dw_pcie_writew_dbi() helper. This causes incorrect
> MSI-X configuration for other PFs.
> 
> Fix this by using dw_pcie_ep_writew_dbi() to write to the correct PF's
> register space, matching the read operation.

Is this another case of using "PF" in a non-SR-IOV context, as I asked
about here?

  https://lore.kernel.org/all/20260223185558.GA3701139@bhelgaas

I do not want to use "PF" unless we're talking about a device with an
SR-IOV Capability and we're doing something specific to SR-IOV.

> Fixes: 70fa02ca1446 ("PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers")
> Reviewed-by: Niklas Cassel <cassel@kernel.org>
> Signed-off-by: Aksh Garg <a-garg7@ti.com>
> ---
> 
> Changes since v1:
> - None
> 
> v1: https://lore.kernel.org/all/20260202072758.101845-2-a-garg7@ti.com/
> 
>  drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 7e7844ff0f7e..771241e1a2c9 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -745,7 +745,7 @@ static int dw_pcie_ep_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
>  	val = dw_pcie_ep_readw_dbi(ep, func_no, reg);
>  	val &= ~PCI_MSIX_FLAGS_QSIZE;
>  	val |= nr_irqs - 1; /* encoded as N-1 */
> -	dw_pcie_writew_dbi(pci, reg, val);
> +	dw_pcie_ep_writew_dbi(ep, func_no, reg, val);
>  
>  	reg = ep_func->msix_cap + PCI_MSIX_TABLE;
>  	val = offset | bir;
> -- 
> 2.34.1
>
Re: [PATCH v3 1/2] PCI: dwc: ep: Fix MSI-X configuration to write to correct physical function
Posted by Manivannan Sadhasivam 3 weeks, 3 days ago 
On Fri, Mar 06, 2026 at 12:45:19PM -0600, Bjorn Helgaas wrote:
> On Tue, Feb 24, 2026 at 02:08:16PM +0530, Aksh Garg wrote:
> > The MSI-X configuration code reads from the correct physical function's
> > register space using dw_pcie_ep_readw_dbi(), but writes back only to
> > PF0 using the old dw_pcie_writew_dbi() helper. This causes incorrect
> > MSI-X configuration for other PFs.
> > 
> > Fix this by using dw_pcie_ep_writew_dbi() to write to the correct PF's
> > register space, matching the read operation.
> 
> Is this another case of using "PF" in a non-SR-IOV context, as I asked
> about here?
> 
>   https://lore.kernel.org/all/20260223185558.GA3701139@bhelgaas
> 
> I do not want to use "PF" unless we're talking about a device with an
> SR-IOV Capability and we're doing something specific to SR-IOV.
> 

Fixed the subject and commit log:
https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?h=controller/dwc&id=271d0b1f058ae9815e75233d04b23e3558c3e4f4

- Mani

-- 
மணிவண்ணன் சதாசிவம்
Re: [PATCH v3 1/2] PCI: dwc: ep: Fix MSI-X configuration to write to correct physical function
Posted by Aksh Garg 3 weeks, 3 days ago 

On 07/03/26 00:15, Bjorn Helgaas wrote:
> On Tue, Feb 24, 2026 at 02:08:16PM +0530, Aksh Garg wrote:
>> The MSI-X configuration code reads from the correct physical function's
>> register space using dw_pcie_ep_readw_dbi(), but writes back only to
>> PF0 using the old dw_pcie_writew_dbi() helper. This causes incorrect
>> MSI-X configuration for other PFs.
>>
>> Fix this by using dw_pcie_ep_writew_dbi() to write to the correct PF's
>> register space, matching the read operation.
> 
> Is this another case of using "PF" in a non-SR-IOV context, as I asked
> about here?
> 
>    https://lore.kernel.org/all/20260223185558.GA3701139@bhelgaas
> 
> I do not want to use "PF" unless we're talking about a device with an
> SR-IOV Capability and we're doing something specific to SR-IOV.

I apologize to commit the same mistake here after your feedback. While
posting this series again, I made changes to patch 2/2, but forgot to
look at the commit message for this patch.

> 
>> Fixes: 70fa02ca1446 ("PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers")
>> Reviewed-by: Niklas Cassel <cassel@kernel.org>
>> Signed-off-by: Aksh Garg <a-garg7@ti.com>
>> ---
>>
>> Changes since v1:
>> - None
>>
>> v1: https://lore.kernel.org/all/20260202072758.101845-2-a-garg7@ti.com/
>>
>>   drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
>> index 7e7844ff0f7e..771241e1a2c9 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
>> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
>> @@ -745,7 +745,7 @@ static int dw_pcie_ep_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
>>   	val = dw_pcie_ep_readw_dbi(ep, func_no, reg);
>>   	val &= ~PCI_MSIX_FLAGS_QSIZE;
>>   	val |= nr_irqs - 1; /* encoded as N-1 */
>> -	dw_pcie_writew_dbi(pci, reg, val);
>> +	dw_pcie_ep_writew_dbi(ep, func_no, reg, val);
>>   
>>   	reg = ep_func->msix_cap + PCI_MSIX_TABLE;
>>   	val = offset | bir;
>> -- 
>> 2.34.1
>>

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