Tegra264 BPMP restricts access to GPCDMA reset control and the reset
is expected to be deasserted on boot by BPMP. Hence Make the reset
control optional in the driver.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
drivers/dma/tegra186-gpc-dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
index 4d6fe0efa76e..236a298c26a1 100644
--- a/drivers/dma/tegra186-gpc-dma.c
+++ b/drivers/dma/tegra186-gpc-dma.c
@@ -1382,7 +1382,7 @@ static int tegra_dma_probe(struct platform_device *pdev)
if (IS_ERR(tdma->base_addr))
return PTR_ERR(tdma->base_addr);
- tdma->rst = devm_reset_control_get_exclusive(&pdev->dev, "gpcdma");
+ tdma->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, "gpcdma");
if (IS_ERR(tdma->rst)) {
return dev_err_probe(&pdev->dev, PTR_ERR(tdma->rst),
"Missing controller reset\n");
--
2.50.1
On Tue, Feb 17, 2026 at 11:04:52PM +0530, Akhil R wrote:
> Tegra264 BPMP restricts access to GPCDMA reset control and the reset
what's means of BPMP?
Frank
> is expected to be deasserted on boot by BPMP. Hence Make the reset
> control optional in the driver.
>
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> ---
> drivers/dma/tegra186-gpc-dma.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
> index 4d6fe0efa76e..236a298c26a1 100644
> --- a/drivers/dma/tegra186-gpc-dma.c
> +++ b/drivers/dma/tegra186-gpc-dma.c
> @@ -1382,7 +1382,7 @@ static int tegra_dma_probe(struct platform_device *pdev)
> if (IS_ERR(tdma->base_addr))
> return PTR_ERR(tdma->base_addr);
>
> - tdma->rst = devm_reset_control_get_exclusive(&pdev->dev, "gpcdma");
> + tdma->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, "gpcdma");
> if (IS_ERR(tdma->rst)) {
> return dev_err_probe(&pdev->dev, PTR_ERR(tdma->rst),
> "Missing controller reset\n");
> --
> 2.50.1
>
Hi Frank,
On Tue, 17 Feb 2026 13:04:57 -0500, Frank Li wrote:
> On Tue, Feb 17, 2026 at 11:04:52PM +0530, Akhil R wrote:
>> Tegra264 BPMP restricts access to GPCDMA reset control and the reset
>
> what's means of BPMP?
BPMP is Boot and Power Management Processor which is a co-processor
in Tegra and runs a dedicated firmware. It manages the boot, clock,
reset etc. I will put the expansion in the commit message in the next
version. Do you suggest adding more details?
There is a documentation for this in Linux -
https://www.kernel.org/doc/Documentation/devicetree/bindings/firmware/nvidia%2Ctegra186-bpmp.txt
>
> Frank
>> is expected to be deasserted on boot by BPMP. Hence Make the reset
>> control optional in the driver.
>>
>> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
>> ---
>> drivers/dma/tegra186-gpc-dma.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
>> index 4d6fe0efa76e..236a298c26a1 100644
>> --- a/drivers/dma/tegra186-gpc-dma.c
>> +++ b/drivers/dma/tegra186-gpc-dma.c
>> @@ -1382,7 +1382,7 @@ static int tegra_dma_probe(struct platform_device *pdev)
>> if (IS_ERR(tdma->base_addr))
>> return PTR_ERR(tdma->base_addr);
>>
>> - tdma->rst = devm_reset_control_get_exclusive(&pdev->dev, "gpcdma");
>> + tdma->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, "gpcdma");
>> if (IS_ERR(tdma->rst)) {
>> return dev_err_probe(&pdev->dev, PTR_ERR(tdma->rst),
>> "Missing controller reset\n");
Thanks for the review.
Regards,
Akhil
On 24/02/2026 05:39, Akhil R wrote: > Hi Frank, > > On Tue, 17 Feb 2026 13:04:57 -0500, Frank Li wrote: >> On Tue, Feb 17, 2026 at 11:04:52PM +0530, Akhil R wrote: >>> Tegra264 BPMP restricts access to GPCDMA reset control and the reset >> >> what's means of BPMP? > > BPMP is Boot and Power Management Processor which is a co-processor > in Tegra and runs a dedicated firmware. It manages the boot, clock, > reset etc. I will put the expansion in the commit message in the next > version. Do you suggest adding more details? Technically you don't even need to mention BPMP here if it confuses matters. We can just say that for "Tegra264 there is no reset available for the driver to control and this is handled by boot firmware". Jon -- nvpublic
On Tue, 24 Feb 2026 17:02:24 +0000 Jon Hunter wrote: > On 24/02/2026 05:39, Akhil R wrote: >> Hi Frank, >> >> On Tue, 17 Feb 2026 13:04:57 -0500, Frank Li wrote: >>> On Tue, Feb 17, 2026 at 11:04:52PM +0530, Akhil R wrote: >>>> Tegra264 BPMP restricts access to GPCDMA reset control and the reset >>> >>> what's means of BPMP? >> >> BPMP is Boot and Power Management Processor which is a co-processor >> in Tegra and runs a dedicated firmware. It manages the boot, clock, >> reset etc. I will put the expansion in the commit message in the next >> version. Do you suggest adding more details? > > Technically you don't even need to mention BPMP here if it confuses > matters. We can just say that for "Tegra264 there is no reset available > for the driver to control and this is handled by boot firmware". Ack. I will update the commit message. Regards, Akhil
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