This is the device tree schema for iio driver for Microchip
MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog
Converters with nonvolatile or volatile memory and an SPI Interface.
The families support up to 8 output channels.
The devices can be 8-bit, 10-bit and 12-bit.
Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com>
---
.../bindings/iio/dac/microchip,mcp48feb02.yaml | 299 +++++++++++++++++++++
MAINTAINERS | 6 +
2 files changed, 305 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..78c6bd641c6e37321e4fc056db83eb4277f429b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml
@@ -0,0 +1,299 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/dac/microchip,mcp48feb02.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip MCP48F(E/V)B(0/1/2)(1/2/4/8) DAC with SPI Interface Families
+
+maintainers:
+ - Ariana Lazar <ariana.lazar@microchip.com>
+
+description: |
+ Datasheet for MCP48FEB01, MCP48FEB02, MCP48FEB11, MCP48FEB12, MCP48FEB21,
+ MCP48FEB22 can be found here:
+ https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005429B.pdf
+ Datasheet for MCP48FVB01, MCP48FVB02, MCP48FVB11, MCP48FVB12, MCP48FVB21,
+ MCP48FVB22 can be found here:
+ https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005466A.pdf
+ Datasheet for MCP48FEB04, MCP48FEB14, MCP48FEB24, MCP48FEB08, MCP48FEB18,
+ MCP48FEB28, MCP48FVB04, MCP48FVB14, MCP48FVB24, MCP48FVB08, MCP48FVB18,
+ MCP48FVB28 can be found here:
+ https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS20006362A.pdf
+
+ +------------+--------------+-------------+-------------+------------+
+ | Device | Resolution | Channels | Vref number | Memory |
+ |------------|--------------|-------------|-------------|------------|
+ | MCP48FEB01 | | 1 | 1 | EEPROM |
+ | MCP48FEB02 | 8-bit | 2 | 1 | EEPROM |
+ | MCP48FEB04 | | 4 | 2 | EEPROM |
+ | MCP48FEB08 | | 8 | 2 | EEPROM |
+ |------------|--------------|-------------|-------------|------------|
+ | MCP48FEB11 | | 1 | 1 | EEPROM |
+ | MCP48FEB12 | 10-bit | 2 | 1 | EEPROM |
+ | MCP48FEB14 | | 4 | 2 | EEPROM |
+ | MCP48FEB18 | | 8 | 2 | EEPROM |
+ |------------|--------------|-------------|-------------|------------|
+ | MCP48FEB21 | | 1 | 1 | EEPROM |
+ | MCP48FEB22 | 12-bit | 2 | 1 | EEPROM |
+ | MCP48FEB24 | | 4 | 2 | EEPROM |
+ | MCP48FEB28 | | 8 | 2 | EEPROM |
+ |------------|--------------|-------------|-------------|------------|
+ | MCP48FVB01 | | 1 | 1 | RAM |
+ | MCP48FVB02 | 8-bit | 2 | 1 | RAM |
+ | MCP48FVB04 | | 4 | 2 | RAM |
+ | MCP48FVB08 | | 8 | 2 | RAM |
+ |------------|--------------|-------------|-------------|------------|
+ | MCP48FVB11 | | 1 | 1 | RAM |
+ | MCP48FVB12 | 10-bit | 2 | 1 | RAM |
+ | MCP48FVB14 | | 4 | 2 | RAM |
+ | MCP48FVB18 | | 8 | 2 | RAM |
+ |------------|--------------|-------------|-------------|------------|
+ | MCP48FVB21 | | 1 | 1 | RAM |
+ | MCP48FVB22 | 12-bit | 2 | 1 | RAM |
+ | MCP48FVB24 | | 4 | 2 | RAM |
+ | MCP48FVB28 | | 8 | 2 | RAM |
+ +------------+--------------+-------------+-------------+------------+
+
+properties:
+ compatible:
+ enum:
+ - microchip,mcp48feb01
+ - microchip,mcp48feb02
+ - microchip,mcp48feb04
+ - microchip,mcp48feb08
+ - microchip,mcp48feb11
+ - microchip,mcp48feb12
+ - microchip,mcp48feb14
+ - microchip,mcp48feb18
+ - microchip,mcp48feb21
+ - microchip,mcp48feb22
+ - microchip,mcp48feb24
+ - microchip,mcp48feb28
+ - microchip,mcp48fvb01
+ - microchip,mcp48fvb02
+ - microchip,mcp48fvb04
+ - microchip,mcp48fvb08
+ - microchip,mcp48fvb11
+ - microchip,mcp48fvb12
+ - microchip,mcp48fvb14
+ - microchip,mcp48fvb18
+ - microchip,mcp48fvb21
+ - microchip,mcp48fvb22
+ - microchip,mcp48fvb24
+ - microchip,mcp48fvb28
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ vdd-supply:
+ description:
+ Provides power to the chip and it could be used as reference voltage. The
+ voltage is used to calculate scale. For parts without EEPROM at powerup
+ this will be the selected as voltage reference.
+
+ vref-supply:
+ description: |
+ Vref pin (it could be found as Vref0 into the datasheet) may be used as a
+ voltage reference when this supply is specified. The internal reference
+ will be taken into account for voltage reference besides VDD if this supply
+ does not exist.
+
+ This supply will be voltage reference for the following outputs:
+ - for single-channel device: Vout0;
+ - for dual-channel device: Vout0, Vout1;
+ - for quad-channel device: Vout0, Vout2;
+ - for octal-channel device: Vout0, Vout2, Vout4, Vout6;
+
+ vref1-supply:
+ description: |
+ Vref1 pin may be used as a voltage reference when this supply is specified.
+ The internal reference will be taken into account for voltage reference
+ beside VDD if this supply does not exist.
+
+ This supply will be voltage reference for the following outputs:
+ - for quad-channel device: Vout1, Vout3;
+ - for octal-channel device: Vout1, Vout3, Vout5, Vout7;
+
+ lat-gpios:
+ description:
+ LAT pin to be used as a hardware trigger to synchronously update the DAC
+ channels. The pin is active Low. It could be also found as LAT0 in
+ datasheet.
+ maxItems: 1
+
+ lat1-gpios:
+ description:
+ LAT1 pin to be used as a hardware trigger to synchronously update the odd
+ DAC channels on devices with 4 and 8 channels. The pin is active Low.
+ maxItems: 1
+
+ microchip,vref-buffered:
+ type: boolean
+ description:
+ Enable buffering of the external Vref/Vref0 pin in cases where the
+ external reference voltage does not have sufficient current capability in
+ order not to drop its voltage when connected to the internal resistor
+ ladder circuit.
+
+ microchip,vref1-buffered:
+ type: boolean
+ description:
+ Enable buffering of the external Vref1 pin in cases where the external
+ reference voltage does not have sufficient current capability in order not
+ to drop its voltage when connected to the internal resistor ladder
+ circuit.
+
+patternProperties:
+ "^channel@[0-7]$":
+ $ref: dac.yaml
+ type: object
+ description: Voltage output channel.
+
+ properties:
+ reg:
+ description: The channel number.
+ maxItems: 1
+
+ label:
+ description: Unique name to identify which channel this is.
+
+ required:
+ - reg
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - vdd-supply
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,mcp48feb01
+ - microchip,mcp48feb11
+ - microchip,mcp48feb21
+ - microchip,mcp48fvb01
+ - microchip,mcp48fvb11
+ - microchip,mcp48fvb21
+ then:
+ properties:
+ lat1-gpios: false
+ vref1-supply: false
+ microchip,vref1-buffered: false
+ channel@0:
+ properties:
+ reg:
+ const: 0
+ patternProperties:
+ "^channel@[1-7]$": false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,mcp48feb02
+ - microchip,mcp48feb12
+ - microchip,mcp48feb22
+ - microchip,mcp48fvb02
+ - microchip,mcp48fvb12
+ - microchip,mcp48fvb22
+ then:
+ properties:
+ lat1-gpios: false
+ vref1-supply: false
+ microchip,vref1-buffered: false
+ patternProperties:
+ "^channel@[0-1]$":
+ properties:
+ reg:
+ enum: [0, 1]
+ "^channel@[2-7]$": false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,mcp48fvb04
+ - microchip,mcp48fvb14
+ - microchip,mcp48fvb24
+ - microchip,mcp48feb04
+ - microchip,mcp48feb14
+ - microchip,mcp48feb24
+ then:
+ patternProperties:
+ "^channel@[0-3]$":
+ properties:
+ reg:
+ enum: [0, 1, 2, 3]
+ "^channel@[4-7]$": false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,mcp48fvb08
+ - microchip,mcp48fvb18
+ - microchip,mcp48fvb28
+ - microchip,mcp48feb08
+ - microchip,mcp48feb18
+ - microchip,mcp48feb28
+ then:
+ patternProperties:
+ "^channel@[0-7]$":
+ properties:
+ reg:
+ enum: [0, 1, 2, 3, 4, 5, 6, 7]
+ - if:
+ not:
+ required:
+ - vref-supply
+ then:
+ properties:
+ microchip,vref-buffered: false
+ - if:
+ not:
+ required:
+ - vref1-supply
+ then:
+ properties:
+ microchip,vref1-buffered: false
+
+additionalProperties: false
+
+examples:
+ - |
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dac@0 {
+ compatible = "microchip,mcp48feb08";
+ reg = <0>;
+ vdd-supply = <&vdac_vdd>;
+ vref-supply = <&vref_reg>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel@0 {
+ reg = <0>;
+ label = "Adjustable_voltage_ch0";
+ };
+
+ channel@1 {
+ reg = <0x1>;
+ label = "Adjustable_voltage_ch1";
+ };
+ };
+ };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index a92290fffa163f9fe8fe3f04bf66426f9a894409..ed24fd2758ad0103dbc5191d0ec180f8ee5e8298 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14945,6 +14945,12 @@ S: Maintained
F: Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml
F: drivers/iio/dac/mcp4821.c
+MCP48FEB02 MICROCHIP DAC DRIVER
+M: Ariana Lazar <ariana.lazar@microchip.com>
+L: linux-iio@vger.kernel.org
+S: Supported
+F: Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml
+
MCR20A IEEE-802.15.4 RADIO DRIVER
M: Stefan Schmidt <stefan@datenfreihafen.org>
L: linux-wpan@vger.kernel.org
--
2.43.0On Thu, Feb 12, 2026 at 02:48:34PM +0200, Ariana Lazar wrote:
> This is the device tree schema for iio driver for Microchip
> MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog
> Converters with nonvolatile or volatile memory and an SPI Interface.
>
> The families support up to 8 output channels.
>
> The devices can be 8-bit, 10-bit and 12-bit.
>
> Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com>
Other than the interface, what's actually different between this and the
47? Could they share the same binding?
Cheers,
Conor.
> ---
> .../bindings/iio/dac/microchip,mcp48feb02.yaml | 299 +++++++++++++++++++++
> MAINTAINERS | 6 +
> 2 files changed, 305 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..78c6bd641c6e37321e4fc056db83eb4277f429b8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml
> @@ -0,0 +1,299 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/dac/microchip,mcp48feb02.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip MCP48F(E/V)B(0/1/2)(1/2/4/8) DAC with SPI Interface Families
> +
> +maintainers:
> + - Ariana Lazar <ariana.lazar@microchip.com>
> +
> +description: |
> + Datasheet for MCP48FEB01, MCP48FEB02, MCP48FEB11, MCP48FEB12, MCP48FEB21,
> + MCP48FEB22 can be found here:
> + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005429B.pdf
> + Datasheet for MCP48FVB01, MCP48FVB02, MCP48FVB11, MCP48FVB12, MCP48FVB21,
> + MCP48FVB22 can be found here:
> + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005466A.pdf
> + Datasheet for MCP48FEB04, MCP48FEB14, MCP48FEB24, MCP48FEB08, MCP48FEB18,
> + MCP48FEB28, MCP48FVB04, MCP48FVB14, MCP48FVB24, MCP48FVB08, MCP48FVB18,
> + MCP48FVB28 can be found here:
> + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS20006362A.pdf
> +
> + +------------+--------------+-------------+-------------+------------+
> + | Device | Resolution | Channels | Vref number | Memory |
> + |------------|--------------|-------------|-------------|------------|
> + | MCP48FEB01 | | 1 | 1 | EEPROM |
> + | MCP48FEB02 | 8-bit | 2 | 1 | EEPROM |
> + | MCP48FEB04 | | 4 | 2 | EEPROM |
> + | MCP48FEB08 | | 8 | 2 | EEPROM |
> + |------------|--------------|-------------|-------------|------------|
> + | MCP48FEB11 | | 1 | 1 | EEPROM |
> + | MCP48FEB12 | 10-bit | 2 | 1 | EEPROM |
> + | MCP48FEB14 | | 4 | 2 | EEPROM |
> + | MCP48FEB18 | | 8 | 2 | EEPROM |
> + |------------|--------------|-------------|-------------|------------|
> + | MCP48FEB21 | | 1 | 1 | EEPROM |
> + | MCP48FEB22 | 12-bit | 2 | 1 | EEPROM |
> + | MCP48FEB24 | | 4 | 2 | EEPROM |
> + | MCP48FEB28 | | 8 | 2 | EEPROM |
> + |------------|--------------|-------------|-------------|------------|
> + | MCP48FVB01 | | 1 | 1 | RAM |
> + | MCP48FVB02 | 8-bit | 2 | 1 | RAM |
> + | MCP48FVB04 | | 4 | 2 | RAM |
> + | MCP48FVB08 | | 8 | 2 | RAM |
> + |------------|--------------|-------------|-------------|------------|
> + | MCP48FVB11 | | 1 | 1 | RAM |
> + | MCP48FVB12 | 10-bit | 2 | 1 | RAM |
> + | MCP48FVB14 | | 4 | 2 | RAM |
> + | MCP48FVB18 | | 8 | 2 | RAM |
> + |------------|--------------|-------------|-------------|------------|
> + | MCP48FVB21 | | 1 | 1 | RAM |
> + | MCP48FVB22 | 12-bit | 2 | 1 | RAM |
> + | MCP48FVB24 | | 4 | 2 | RAM |
> + | MCP48FVB28 | | 8 | 2 | RAM |
> + +------------+--------------+-------------+-------------+------------+
> +
> +properties:
> + compatible:
> + enum:
> + - microchip,mcp48feb01
> + - microchip,mcp48feb02
> + - microchip,mcp48feb04
> + - microchip,mcp48feb08
> + - microchip,mcp48feb11
> + - microchip,mcp48feb12
> + - microchip,mcp48feb14
> + - microchip,mcp48feb18
> + - microchip,mcp48feb21
> + - microchip,mcp48feb22
> + - microchip,mcp48feb24
> + - microchip,mcp48feb28
> + - microchip,mcp48fvb01
> + - microchip,mcp48fvb02
> + - microchip,mcp48fvb04
> + - microchip,mcp48fvb08
> + - microchip,mcp48fvb11
> + - microchip,mcp48fvb12
> + - microchip,mcp48fvb14
> + - microchip,mcp48fvb18
> + - microchip,mcp48fvb21
> + - microchip,mcp48fvb22
> + - microchip,mcp48fvb24
> + - microchip,mcp48fvb28
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + vdd-supply:
> + description:
> + Provides power to the chip and it could be used as reference voltage. The
> + voltage is used to calculate scale. For parts without EEPROM at powerup
> + this will be the selected as voltage reference.
> +
> + vref-supply:
> + description: |
> + Vref pin (it could be found as Vref0 into the datasheet) may be used as a
> + voltage reference when this supply is specified. The internal reference
> + will be taken into account for voltage reference besides VDD if this supply
> + does not exist.
> +
> + This supply will be voltage reference for the following outputs:
> + - for single-channel device: Vout0;
> + - for dual-channel device: Vout0, Vout1;
> + - for quad-channel device: Vout0, Vout2;
> + - for octal-channel device: Vout0, Vout2, Vout4, Vout6;
> +
> + vref1-supply:
> + description: |
> + Vref1 pin may be used as a voltage reference when this supply is specified.
> + The internal reference will be taken into account for voltage reference
> + beside VDD if this supply does not exist.
> +
> + This supply will be voltage reference for the following outputs:
> + - for quad-channel device: Vout1, Vout3;
> + - for octal-channel device: Vout1, Vout3, Vout5, Vout7;
> +
> + lat-gpios:
> + description:
> + LAT pin to be used as a hardware trigger to synchronously update the DAC
> + channels. The pin is active Low. It could be also found as LAT0 in
> + datasheet.
> + maxItems: 1
> +
> + lat1-gpios:
> + description:
> + LAT1 pin to be used as a hardware trigger to synchronously update the odd
> + DAC channels on devices with 4 and 8 channels. The pin is active Low.
> + maxItems: 1
> +
> + microchip,vref-buffered:
> + type: boolean
> + description:
> + Enable buffering of the external Vref/Vref0 pin in cases where the
> + external reference voltage does not have sufficient current capability in
> + order not to drop its voltage when connected to the internal resistor
> + ladder circuit.
> +
> + microchip,vref1-buffered:
> + type: boolean
> + description:
> + Enable buffering of the external Vref1 pin in cases where the external
> + reference voltage does not have sufficient current capability in order not
> + to drop its voltage when connected to the internal resistor ladder
> + circuit.
> +
> +patternProperties:
> + "^channel@[0-7]$":
> + $ref: dac.yaml
> + type: object
> + description: Voltage output channel.
> +
> + properties:
> + reg:
> + description: The channel number.
> + maxItems: 1
> +
> + label:
> + description: Unique name to identify which channel this is.
> +
> + required:
> + - reg
> +
> + unevaluatedProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - vdd-supply
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - microchip,mcp48feb01
> + - microchip,mcp48feb11
> + - microchip,mcp48feb21
> + - microchip,mcp48fvb01
> + - microchip,mcp48fvb11
> + - microchip,mcp48fvb21
> + then:
> + properties:
> + lat1-gpios: false
> + vref1-supply: false
> + microchip,vref1-buffered: false
> + channel@0:
> + properties:
> + reg:
> + const: 0
> + patternProperties:
> + "^channel@[1-7]$": false
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - microchip,mcp48feb02
> + - microchip,mcp48feb12
> + - microchip,mcp48feb22
> + - microchip,mcp48fvb02
> + - microchip,mcp48fvb12
> + - microchip,mcp48fvb22
> + then:
> + properties:
> + lat1-gpios: false
> + vref1-supply: false
> + microchip,vref1-buffered: false
> + patternProperties:
> + "^channel@[0-1]$":
> + properties:
> + reg:
> + enum: [0, 1]
> + "^channel@[2-7]$": false
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - microchip,mcp48fvb04
> + - microchip,mcp48fvb14
> + - microchip,mcp48fvb24
> + - microchip,mcp48feb04
> + - microchip,mcp48feb14
> + - microchip,mcp48feb24
> + then:
> + patternProperties:
> + "^channel@[0-3]$":
> + properties:
> + reg:
> + enum: [0, 1, 2, 3]
> + "^channel@[4-7]$": false
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - microchip,mcp48fvb08
> + - microchip,mcp48fvb18
> + - microchip,mcp48fvb28
> + - microchip,mcp48feb08
> + - microchip,mcp48feb18
> + - microchip,mcp48feb28
> + then:
> + patternProperties:
> + "^channel@[0-7]$":
> + properties:
> + reg:
> + enum: [0, 1, 2, 3, 4, 5, 6, 7]
> + - if:
> + not:
> + required:
> + - vref-supply
> + then:
> + properties:
> + microchip,vref-buffered: false
> + - if:
> + not:
> + required:
> + - vref1-supply
> + then:
> + properties:
> + microchip,vref1-buffered: false
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + dac@0 {
> + compatible = "microchip,mcp48feb08";
> + reg = <0>;
> + vdd-supply = <&vdac_vdd>;
> + vref-supply = <&vref_reg>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + channel@0 {
> + reg = <0>;
> + label = "Adjustable_voltage_ch0";
> + };
> +
> + channel@1 {
> + reg = <0x1>;
> + label = "Adjustable_voltage_ch1";
> + };
> + };
> + };
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a92290fffa163f9fe8fe3f04bf66426f9a894409..ed24fd2758ad0103dbc5191d0ec180f8ee5e8298 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -14945,6 +14945,12 @@ S: Maintained
> F: Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml
> F: drivers/iio/dac/mcp4821.c
>
> +MCP48FEB02 MICROCHIP DAC DRIVER
> +M: Ariana Lazar <ariana.lazar@microchip.com>
> +L: linux-iio@vger.kernel.org
> +S: Supported
> +F: Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml
> +
> MCR20A IEEE-802.15.4 RADIO DRIVER
> M: Stefan Schmidt <stefan@datenfreihafen.org>
> L: linux-wpan@vger.kernel.org
>
> --
> 2.43.0
>
On Thu, Feb 12, 2026 at 06:00:06PM +0000, Conor Dooley wrote: > On Thu, Feb 12, 2026 at 02:48:34PM +0200, Ariana Lazar wrote: > > This is the device tree schema for iio driver for Microchip > > MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog > > Converters with nonvolatile or volatile memory and an SPI Interface. > > > > The families support up to 8 output channels. > > > > The devices can be 8-bit, 10-bit and 12-bit. > > > > Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com> > > Other than the interface, what's actually different between this and the > 47? Could they share the same binding? If that is the case, I don't think we even need a brand new driver, the existing one should be refactored to adapt SPI interface. -- With Best Regards, Andy Shevchenko
Hi all, Thank you for your reviews. On Thu, 2026-02-12 at 22:04 +0200, Andy Shevchenko wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On Thu, Feb 12, 2026 at 06:00:06PM +0000, Conor Dooley wrote: > > On Thu, Feb 12, 2026 at 02:48:34PM +0200, Ariana Lazar wrote: > > > This is the device tree schema for iio driver for Microchip > > > MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to- > > > Analog > > > Converters with nonvolatile or volatile memory and an SPI > > > Interface. > > > > > > The families support up to 8 output channels. > > > > > > The devices can be 8-bit, 10-bit and 12-bit. > > > > > > Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com> > > > > Other than the interface, what's actually different between this > > and the > > 47? Could they share the same binding? > > If that is the case, I don't think we even need a brand new driver, > the > existing one should be refactored to adapt SPI interface. > > -- > With Best Regards, > Andy Shevchenko > > I have decided to submit two separate drivers, even though the chips share similar functionality, in order to make it easier for the client to identify the supported chips. For example the I2C family of devices has: 3 different resolutions, with 4 different channel numbers available for a particular part and most important you can get the same part with or without EEPROM. That means the I2C driver will cover 24 different devices. The SPI family follows the same pattern, covering another 24 devices. Microchip also has some devices (I2C and SPI) with Nonvolatile Memory (similar to EEPROM but limited to fewer than 32 writes) and I want to add these families to the existing drivers while maintaining the split by interface. Please tell me if you have anything against this approach (having 2 different drivers split based on interface and each of them to support at least 24 different part numbers). Best regards, Ariana
On 2/16/26 7:31 AM, Ariana.Lazar@microchip.com wrote: > Hi all, > > Thank you for your reviews. > > > On Thu, 2026-02-12 at 22:04 +0200, Andy Shevchenko wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you >> know the content is safe >> >> On Thu, Feb 12, 2026 at 06:00:06PM +0000, Conor Dooley wrote: >>> On Thu, Feb 12, 2026 at 02:48:34PM +0200, Ariana Lazar wrote: >>>> This is the device tree schema for iio driver for Microchip >>>> MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to- >>>> Analog >>>> Converters with nonvolatile or volatile memory and an SPI >>>> Interface. >>>> >>>> The families support up to 8 output channels. >>>> >>>> The devices can be 8-bit, 10-bit and 12-bit. >>>> >>>> Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com> >>> >>> Other than the interface, what's actually different between this >>> and the >>> 47? Could they share the same binding? >> >> If that is the case, I don't think we even need a brand new driver, >> the >> existing one should be refactored to adapt SPI interface. >> >> -- >> With Best Regards, >> Andy Shevchenko >> >> > > > I have decided to submit two separate drivers, even though the chips > share similar functionality, in order to make it easier for the client > to identify the supported chips. > > For example the I2C family of devices has: 3 different resolutions, > with 4 different channel numbers available for a particular part and > most important you can get the same part with or without EEPROM. > That means the I2C driver will cover 24 different devices. The SPI > family follows the same pattern, covering another 24 devices. > > Microchip also has some devices (I2C and SPI) with Nonvolatile Memory > (similar to EEPROM but limited to fewer than 32 writes) and I want to > add these families to the existing drivers while maintaining the split > by interface. > > Please tell me if you have anything against this approach (having 2 > different drivers split based on interface and each of them to support > at least 24 different part numbers). > > Best regards, > Ariana The usual way we support parts with the same register map that can have an I2C or a SPI bus it to make three modules: <name>_core.c, <name>_i2c.c and <name>_spi.c. If you look through the iio folders, you will see many drivers like this. The _i2c.c and _spi.c files will just contain the chip info tables that contain all of the differences between the chips and pass that to a common probe function in the _core.c module. It seems like this approach should work in your case as well.
On Mon, Feb 16, 2026 at 09:37:35AM -0600, David Lechner wrote: > On 2/16/26 7:31 AM, Ariana.Lazar@microchip.com wrote: > > Hi all, > > > > Thank you for your reviews. > > > > > > On Thu, 2026-02-12 at 22:04 +0200, Andy Shevchenko wrote: > >> EXTERNAL EMAIL: Do not click links or open attachments unless you > >> know the content is safe > >> > >> On Thu, Feb 12, 2026 at 06:00:06PM +0000, Conor Dooley wrote: > >>> On Thu, Feb 12, 2026 at 02:48:34PM +0200, Ariana Lazar wrote: > >>>> This is the device tree schema for iio driver for Microchip > >>>> MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to- > >>>> Analog > >>>> Converters with nonvolatile or volatile memory and an SPI > >>>> Interface. > >>>> > >>>> The families support up to 8 output channels. > >>>> > >>>> The devices can be 8-bit, 10-bit and 12-bit. > >>>> > >>>> Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com> > >>> > >>> Other than the interface, what's actually different between this > >>> and the > >>> 47? Could they share the same binding? > >> > >> If that is the case, I don't think we even need a brand new driver, > >> the > >> existing one should be refactored to adapt SPI interface. > >> > >> -- > >> With Best Regards, > >> Andy Shevchenko > >> > >> > > > > > > I have decided to submit two separate drivers, even though the chips > > share similar functionality, in order to make it easier for the client > > to identify the supported chips. > > > > For example the I2C family of devices has: 3 different resolutions, > > with 4 different channel numbers available for a particular part and > > most important you can get the same part with or without EEPROM. > > That means the I2C driver will cover 24 different devices. The SPI > > family follows the same pattern, covering another 24 devices. > > > > Microchip also has some devices (I2C and SPI) with Nonvolatile Memory > > (similar to EEPROM but limited to fewer than 32 writes) and I want to > > add these families to the existing drivers while maintaining the split > > by interface. > > > > Please tell me if you have anything against this approach (having 2 > > different drivers split based on interface and each of them to support > > at least 24 different part numbers). > > > > Best regards, > > Ariana > > The usual way we support parts with the same register map that can have > an I2C or a SPI bus it to make three modules: <name>_core.c, <name>_i2c.c > and <name>_spi.c. If you look through the iio folders, you will see many > drivers like this. > > The _i2c.c and _spi.c files will just contain the chip info tables that > contain all of the differences between the chips and pass that to a > common probe function in the _core.c module. > > It seems like this approach should work in your case as well. These usually have merged bindings too, right? Only real difference is going to be that the spi devices will need spi-peripheral-properties.yaml which obviously the i2c ones wont.
On 2/16/26 11:34 AM, Conor Dooley wrote: > On Mon, Feb 16, 2026 at 09:37:35AM -0600, David Lechner wrote: >> On 2/16/26 7:31 AM, Ariana.Lazar@microchip.com wrote: >>> Hi all, >>> >>> Thank you for your reviews. >>> >>> >>> On Thu, 2026-02-12 at 22:04 +0200, Andy Shevchenko wrote: >>>> EXTERNAL EMAIL: Do not click links or open attachments unless you >>>> know the content is safe >>>> >>>> On Thu, Feb 12, 2026 at 06:00:06PM +0000, Conor Dooley wrote: >>>>> On Thu, Feb 12, 2026 at 02:48:34PM +0200, Ariana Lazar wrote: >>>>>> This is the device tree schema for iio driver for Microchip >>>>>> MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to- >>>>>> Analog >>>>>> Converters with nonvolatile or volatile memory and an SPI >>>>>> Interface. >>>>>> >>>>>> The families support up to 8 output channels. >>>>>> >>>>>> The devices can be 8-bit, 10-bit and 12-bit. >>>>>> >>>>>> Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com> >>>>> >>>>> Other than the interface, what's actually different between this >>>>> and the >>>>> 47? Could they share the same binding? >>>> >>>> If that is the case, I don't think we even need a brand new driver, >>>> the >>>> existing one should be refactored to adapt SPI interface. >>>> >>>> -- >>>> With Best Regards, >>>> Andy Shevchenko >>>> >>>> >>> >>> >>> I have decided to submit two separate drivers, even though the chips >>> share similar functionality, in order to make it easier for the client >>> to identify the supported chips. >>> >>> For example the I2C family of devices has: 3 different resolutions, >>> with 4 different channel numbers available for a particular part and >>> most important you can get the same part with or without EEPROM. >>> That means the I2C driver will cover 24 different devices. The SPI >>> family follows the same pattern, covering another 24 devices. >>> >>> Microchip also has some devices (I2C and SPI) with Nonvolatile Memory >>> (similar to EEPROM but limited to fewer than 32 writes) and I want to >>> add these families to the existing drivers while maintaining the split >>> by interface. >>> >>> Please tell me if you have anything against this approach (having 2 >>> different drivers split based on interface and each of them to support >>> at least 24 different part numbers). >>> >>> Best regards, >>> Ariana >> >> The usual way we support parts with the same register map that can have >> an I2C or a SPI bus it to make three modules: <name>_core.c, <name>_i2c.c >> and <name>_spi.c. If you look through the iio folders, you will see many >> drivers like this. >> >> The _i2c.c and _spi.c files will just contain the chip info tables that >> contain all of the differences between the chips and pass that to a >> common probe function in the _core.c module. >> >> It seems like this approach should work in your case as well. > > These usually have merged bindings too, right? Only real difference is > going to be that the spi devices will need > spi-peripheral-properties.yaml which obviously the i2c ones wont. Correct.
On Thu, 12 Feb 2026 14:48:34 +0200, Ariana Lazar wrote: > This is the device tree schema for iio driver for Microchip > MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog > Converters with nonvolatile or volatile memory and an SPI Interface. > > The families support up to 8 output channels. > > The devices can be 8-bit, 10-bit and 12-bit. > > Signed-off-by: Ariana Lazar <ariana.lazar@microchip.com> > --- > .../bindings/iio/dac/microchip,mcp48feb02.yaml | 299 +++++++++++++++++++++ > MAINTAINERS | 6 + > 2 files changed, 305 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: ./Documentation/devicetree/bindings/iio/dac/microchip,mcp48feb02.yaml:275:5: [warning] wrong indentation: expected 2 but found 4 (indentation) dtschema/dtc warnings/errors: doc reference errors (make refcheckdocs): See https://patchwork.kernel.org/project/devicetree/patch/20260212-mcp48feb02-v1-1-ce5843db65db@microchip.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
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