Add reset status detection for NPCM7XX and NPCM8XX platforms via syscon
integration. Document syscon property and three configurable reset type
properties (nuvoton,card-reset-type, nuvoton,ext1-reset-type,
nuvoton,ext2-reset-type)that map reset signal detection to specific
reset bit positions.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
 .../watchdog/nuvoton,npcm750-wdt.yaml         | 51 ++++++++++++++++++-
 1 file changed, 49 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml
index 7aa30f5b5c49..054cc0115af2 100644
--- a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml
@@ -12,7 +12,7 @@ maintainers:
 description:
   Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
   The watchdog supports a pre-timeout interrupt that fires 10ms before the
-  expiry.
+  expiry and reset status detection via syscon integration.
 
 allOf:
   - $ref: watchdog.yaml#
@@ -40,12 +40,55 @@ properties:
   clock-frequency:
     description: Frequency in Hz of the clock that drives the NPCM timer.
 
+  syscon:
+    description: phandle to the Global Control Register (GCR) syscon node.
+    $ref: /schemas/types.yaml#/definitions/phandle
+
+  nuvoton,card-reset-type:
+    description: Reset type for external card reset signal detection.
+    enum:
+      - porst
+      - corst
+      - wd0
+      - wd1
+      - wd2
+      - sw1
+      - sw2
+      - sw3
+      - sw4
+
+  nuvoton,ext1-reset-type:
+    description: Reset type for external reset signal 1 detection.
+    enum:
+      - porst
+      - corst
+      - wd0
+      - wd1
+      - wd2
+      - sw1
+      - sw2
+      - sw3
+      - sw4
+
+  nuvoton,ext2-reset-type:
+    description: Reset type for external reset signal 2 detection.
+    enum:
+      - porst
+      - corst
+      - wd0
+      - wd1
+      - wd2
+      - sw1
+      - sw2
+      - sw3
+      - sw4
+
 required:
   - compatible
   - reg
   - interrupts
 
-unevaluatedProperties: false
+additionalProperties: false
 
 examples:
   - |
@@ -57,4 +100,8 @@ examples:
         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
         reg = <0xf000801c 0x4>;
         clocks = <&clk NPCM7XX_CLK_TIMER>;
+        syscon = <&gcr>;
+        nuvoton,card-reset-type = "porst";
+        nuvoton,ext1-reset-type = "wd0";
+        nuvoton,ext2-reset-type = "wd2";
     };
-- 
2.34.1

On 10/02/2026 14:38, Tomer Maimon wrote:
> Add reset status detection for NPCM7XX and NPCM8XX platforms via syscon
> integration. Document syscon property and three configurable reset type
> properties (nuvoton,card-reset-type, nuvoton,ext1-reset-type,
> nuvoton,ext2-reset-type)that map reset signal detection to specific
> reset bit positions.
> 
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
>  .../watchdog/nuvoton,npcm750-wdt.yaml         | 51 ++++++++++++++++++-
>  1 file changed, 49 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml
> index 7aa30f5b5c49..054cc0115af2 100644
> --- a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml
> @@ -12,7 +12,7 @@ maintainers:
>  description:
>    Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
>    The watchdog supports a pre-timeout interrupt that fires 10ms before the
> -  expiry.
> +  expiry and reset status detection via syscon integration.
>  
>  allOf:
>    - $ref: watchdog.yaml#
> @@ -40,12 +40,55 @@ properties:
>    clock-frequency:
>      description: Frequency in Hz of the clock that drives the NPCM timer.
>  
> +  syscon:

First iteration. See "How to Get Your DT Schema Bindings Accepted in
Less Than 10 Iterations"

or just read the docs please.

> +    description: phandle to the Global Control Register (GCR) syscon node.
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +
> +  nuvoton,card-reset-type:
> +    description: Reset type for external card reset signal detection.
> +    enum:
> +      - porst
> +      - corst
> +      - wd0
> +      - wd1
> +      - wd2
> +      - sw1
> +      - sw2
> +      - sw3
> +      - sw4

You want it to be static configuration, so cannot be changed runtime? Why?

> +
> +  nuvoton,ext1-reset-type:
> +    description: Reset type for external reset signal 1 detection.
> +    enum:
> +      - porst
> +      - corst
> +      - wd0
> +      - wd1
> +      - wd2
> +      - sw1
> +      - sw2
> +      - sw3
> +      - sw4
> +
> +  nuvoton,ext2-reset-type:
> +    description: Reset type for external reset signal 2 detection.
> +    enum:
> +      - porst
> +      - corst
> +      - wd0
> +      - wd1
> +      - wd2
> +      - sw1
> +      - sw2
> +      - sw3
> +      - sw4
> +
>  required:
>    - compatible
>    - reg
>    - interrupts
>  
> -unevaluatedProperties: false
> +additionalProperties: false

Why? Nothing explains this in the commit msg.


>  
>  examples:
>    - |
> @@ -57,4 +100,8 @@ examples:
>          interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
>          reg = <0xf000801c 0x4>;
>          clocks = <&clk NPCM7XX_CLK_TIMER>;
> +        syscon = <&gcr>;
> +        nuvoton,card-reset-type = "porst";
> +        nuvoton,ext1-reset-type = "wd0";
> +        nuvoton,ext2-reset-type = "wd2";
>      };


Best regards,
Krzysztof