[v1] Add RZ/G3L IRQC support

[PATCH 0/8] Add RZ/G3L IRQC support

Biju posted 8 patches 4 days, 5 hours ago

Diff against v2 v3
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.../renesas,rzg2l-irqc.yaml                   |  66 +++++-
arch/arm64/boot/dts/renesas/r9a08g046.dtsi    |  91 ++++++++
drivers/irqchip/irq-renesas-rzg2l.c           | 218 +++++++++++++++---
3 files changed, 343 insertions(+), 32 deletions(-)

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[PATCH 0/8] Add RZ/G3L IRQC support

Posted by Biju 4 days, 5 hours ago

From: Biju Das <biju.das.jz@bp.renesas.com>

The IRQC block on RZ/G3L SoC is almost identical to one found on the
RZ/G3S SoC with the difference like it support more External IRQs, GPT
Error Interrupts and also has additional registers for GPT/MTU IRQ
selection, shared IRQ selection between external IRQ and TINT.

It has 16 external interrupts of which 8 interrupts are shared with
TINT[24:31] and are mutually exclusive. The external IRQ/TINT IRQ
selection is based on a register in the ICU block.

Biju Das (8):
  dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3L
    SoC
  irqchip/renesas-rzg2l: Make fwspec variable as pointer in struct
    rzg2l_irqc_priv
  irqchip/renesas-rzg2l: Drop IRQC_NUM_IRQ macro
  irqchip/renesas-rzg2l: Drop IRQC_TINT_START macro
  irqchip/renesas-rzg2l: Drop IRQC_IRQ_COUNT macro
  irqchip/renesas-rzg2l: Add RZ/G3L support
  irqchip/renesas-rzg2l: Add shared irq support
  arm64: dts: renesas: r9a08g046: Add ICU node

 .../renesas,rzg2l-irqc.yaml                   |  66 +++++-
 arch/arm64/boot/dts/renesas/r9a08g046.dtsi    |  91 ++++++++
 drivers/irqchip/irq-renesas-rzg2l.c           | 218 +++++++++++++++---
 3 files changed, 343 insertions(+), 32 deletions(-)

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2.43.0