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[PATCH] arm64: dts: imx943-evk: add usdhc3 for SDIO WiFi support

Sherry Sun posted 1 patch 4 days, 3 hours ago
There is a newer version of this series
arch/arm64/boot/dts/freescale/imx943-evk.dts | 63 ++++++++++++++++++++
1 file changed, 63 insertions(+)
[PATCH] arm64: dts: imx943-evk: add usdhc3 for SDIO WiFi support
Posted by Sherry Sun 4 days, 3 hours ago 
Add usdhc3 to support M.2 SDIO WiFi on i.MX943 EVK board.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx943-evk.dts | 63 ++++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts
index f54404c9bfc9..8f4f6875d036 100644
--- a/arch/arm64/boot/dts/freescale/imx943-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts
@@ -20,6 +20,7 @@ aliases {
 		i2c5 = &lpi2c6;
 		mmc0 = &usdhc1;
 		mmc1 = &usdhc2;
+		mmc2 = &usdhc3;
 		serial0 = &lpuart1;
 		serial5 = &lpuart6;
 	};
@@ -54,6 +55,33 @@ dmic: dmic {
 		#sound-dai-cells = <0>;
 	};
 
+	reg_m2_pwr: regulator-m2-pwr {
+		compatible = "regulator-fixed";
+		regulator-name = "M.2-power";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pcal6416_i2c3_u46 2 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		/*
+		 * M.2 device only can be enabled(W_DISABLE1#) after all Power
+		 * Rails reach their minimum operating voltage (PCI Express M.2
+		 * Specification r5.1 3.1.4 Power-up Timing).
+		 * Set a delay equal to the max value of Tsettle here.
+		 */
+		startup-delay-us = <5000>;
+	};
+
+	reg_m2_wlan: regulator-wlan {
+		compatible = "regulator-fixed";
+		regulator-name = "WLAN_EN";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&reg_m2_pwr>;
+		gpio = <&pcal6416_i2c3_u46 5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+
 	reg_usdhc2_vmmc: regulator-usdhc2 {
 		compatible = "regulator-fixed";
 		off-on-delay-us = <12000>;
@@ -145,6 +173,12 @@ memory@80000000 {
 		reg = <0x0 0x80000000 0x0 0x80000000>;
 		device_type = "memory";
 	};
+
+	usdhc3_pwrseq: usdhc3_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&pcal6416_i2c3_u46 4 GPIO_ACTIVE_LOW>;
+	};
+
 };
 
 &enetc1 {
@@ -760,6 +794,18 @@ IMX94_PAD_SD2_RESET_B__GPIO4_IO27	0x31e
 		>;
 	};
 
+	pinctrl_usdhc3: usdhc3grp {
+		fsl,pins = <
+			IMX94_PAD_GPIO_IO48__USDHC3_CLK		0x158e
+			/* Need to config the SION for CMD pad, refer to ERR053138 */
+			IMX94_PAD_GPIO_IO49__USDHC3_CMD		0x4000138e
+			IMX94_PAD_GPIO_IO50__USDHC3_DATA0	0x138e
+			IMX94_PAD_GPIO_IO51__USDHC3_DATA1	0x138e
+			IMX94_PAD_GPIO_IO52__USDHC3_DATA2	0x138e
+			IMX94_PAD_GPIO_IO53__USDHC3_DATA3	0x138e
+		>;
+	};
+
 	pinctrl_xspi1: xspi1grp {
 		fsl,pins = <
 			IMX94_PAD_XSPI1_SCLK__XSPI1_A_SCLK	0x3fe
@@ -802,6 +848,23 @@ &usdhc2 {
 	status = "okay";
 };
 
+&usdhc3 {
+	/*
+	 * Only enable SDIO2.0 mode as the corresponding GPIO pads are 3.3V, the
+	 * max frequency is 50MHz.
+	 */
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3>;
+	pinctrl-names = "default", "sleep";
+	bus-width = <4>;
+	vmmc-supply = <&reg_m2_wlan>;
+	mmc-pwrseq = <&usdhc3_pwrseq>;
+	keep-power-in-suspend;
+	non-removable;
+	wakeup-source;
+	status = "okay";
+};
+
 &wdog3 {
 	fsl,ext-reset-output;
 	status = "okay";
-- 
2.37.1
Re: [PATCH] arm64: dts: imx943-evk: add usdhc3 for SDIO WiFi support
Posted by Frank Li 3 days, 18 hours ago 
On Tue, Feb 03, 2026 at 05:14:59PM +0800, Sherry Sun wrote:
> Add usdhc3 to support M.2 SDIO WiFi on i.MX943 EVK board.
>
> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx943-evk.dts | 63 ++++++++++++++++++++
>  1 file changed, 63 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts
> index f54404c9bfc9..8f4f6875d036 100644
> --- a/arch/arm64/boot/dts/freescale/imx943-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts
> @@ -20,6 +20,7 @@ aliases {
>  		i2c5 = &lpi2c6;
>  		mmc0 = &usdhc1;
>  		mmc1 = &usdhc2;
> +		mmc2 = &usdhc3;
>  		serial0 = &lpuart1;
>  		serial5 = &lpuart6;
>  	};
> @@ -54,6 +55,33 @@ dmic: dmic {
>  		#sound-dai-cells = <0>;
>  	};
>
> +	reg_m2_pwr: regulator-m2-pwr {
> +		compatible = "regulator-fixed";
> +		regulator-name = "M.2-power";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&pcal6416_i2c3_u46 2 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		/*
> +		 * M.2 device only can be enabled(W_DISABLE1#) after all Power
> +		 * Rails reach their minimum operating voltage (PCI Express M.2
> +		 * Specification r5.1 3.1.4 Power-up Timing).
> +		 * Set a delay equal to the max value of Tsettle here.
> +		 */
> +		startup-delay-us = <5000>;
> +	};
> +
> +	reg_m2_wlan: regulator-wlan {
> +		compatible = "regulator-fixed";
> +		regulator-name = "WLAN_EN";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&reg_m2_pwr>;
> +		gpio = <&pcal6416_i2c3_u46 5 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +
>  	reg_usdhc2_vmmc: regulator-usdhc2 {
>  		compatible = "regulator-fixed";
>  		off-on-delay-us = <12000>;
> @@ -145,6 +173,12 @@ memory@80000000 {
>  		reg = <0x0 0x80000000 0x0 0x80000000>;
>  		device_type = "memory";
>  	};
> +
> +	usdhc3_pwrseq: usdhc3_pwrseq {
> +		compatible = "mmc-pwrseq-simple";
> +		reset-gpios = <&pcal6416_i2c3_u46 4 GPIO_ACTIVE_LOW>;
> +	};
> +

put usdhc3_pwrseq before @hexvalue nodes.

Frank
>  };
>
>  &enetc1 {
> @@ -760,6 +794,18 @@ IMX94_PAD_SD2_RESET_B__GPIO4_IO27	0x31e
>  		>;
>  	};
>
> +	pinctrl_usdhc3: usdhc3grp {
> +		fsl,pins = <
> +			IMX94_PAD_GPIO_IO48__USDHC3_CLK		0x158e
> +			/* Need to config the SION for CMD pad, refer to ERR053138 */
> +			IMX94_PAD_GPIO_IO49__USDHC3_CMD		0x4000138e
> +			IMX94_PAD_GPIO_IO50__USDHC3_DATA0	0x138e
> +			IMX94_PAD_GPIO_IO51__USDHC3_DATA1	0x138e
> +			IMX94_PAD_GPIO_IO52__USDHC3_DATA2	0x138e
> +			IMX94_PAD_GPIO_IO53__USDHC3_DATA3	0x138e
> +		>;
> +	};
> +
>  	pinctrl_xspi1: xspi1grp {
>  		fsl,pins = <
>  			IMX94_PAD_XSPI1_SCLK__XSPI1_A_SCLK	0x3fe
> @@ -802,6 +848,23 @@ &usdhc2 {
>  	status = "okay";
>  };
>
> +&usdhc3 {
> +	/*
> +	 * Only enable SDIO2.0 mode as the corresponding GPIO pads are 3.3V, the
> +	 * max frequency is 50MHz.
> +	 */
> +	pinctrl-0 = <&pinctrl_usdhc3>;
> +	pinctrl-1 = <&pinctrl_usdhc3>;
> +	pinctrl-names = "default", "sleep";
> +	bus-width = <4>;
> +	vmmc-supply = <&reg_m2_wlan>;
> +	mmc-pwrseq = <&usdhc3_pwrseq>;
> +	keep-power-in-suspend;
> +	non-removable;
> +	wakeup-source;
> +	status = "okay";
> +};
> +
>  &wdog3 {
>  	fsl,ext-reset-output;
>  	status = "okay";
> --
> 2.37.1
>

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