Relaxed I/O accessors for `Mmio` are currently implemented as an extra
set of methods that mirror the ones defined in `Io`, but with the
`_relaxed` suffix.
This makes these methods impossible to use with generic code, which is a
highly plausible proposition now that we have the `Io` trait.
Address this by adding a new `RelaxedMmio` wrapper type for `Mmio` that
provides its own `IoCapable` implementations relying on the relaxed C
accessors. This makes it possible to use relaxed operations on a `Mmio`
simply by wrapping it, and to use `RelaxedMmio` in code generic against
`Io`.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
rust/kernel/io.rs | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 64 insertions(+), 2 deletions(-)
diff --git a/rust/kernel/io.rs b/rust/kernel/io.rs
index dc894a45bbcc..baa8d3baa20c 100644
--- a/rust/kernel/io.rs
+++ b/rust/kernel/io.rs
@@ -556,9 +556,15 @@ fn io_addr_assert<U>(&self, offset: usize) -> usize {
/// Implements [`IoCapable`] on `$mmio` for `$ty` using `$read_fn` and `$write_fn`.
macro_rules! impl_mmio_io_capable {
- ($mmio:ident, $(#[$attr:meta])* $ty:ty, $read_fn:ident, $write_fn:ident) => {
+ (
+ $mmio:ident $(< $($generics:tt),+ >)*,
+ $(#[$attr:meta])* $ty:ty,
+ $read_fn:ident, $write_fn:ident
+ ) => {
$(#[$attr])*
- impl<const SIZE: usize> IoCapable<$ty> for $mmio<SIZE> {
+ impl<$($($generics),+,)* const SIZE: usize> IoCapable<$ty>
+ for $mmio<$($($generics),+,)* SIZE>
+ {
unsafe fn io_read(&self, address: usize) -> $ty {
// SAFETY: By the trait invariant `address` is a valid address for MMIO operations.
unsafe { bindings::$read_fn(address as *const c_void) }
@@ -695,3 +701,59 @@ pub unsafe fn from_raw(raw: &MmioRaw<SIZE>) -> &Self {
call_mmio_write(writeq_relaxed) <- u64
);
}
+
+/// [`Mmio`] wrapper using relaxed accessors.
+///
+/// This provides an implementation of [`Io`] that uses relaxed I/O MMIO operands instead of the
+/// regular ones.
+///
+/// # Examples
+///
+/// ```no_run
+/// use kernel::io::{Io, Mmio, RelaxedMmio};
+///
+/// fn do_io(io: &Mmio<0x100>) {
+/// let relaxed_io = RelaxedMmio::from(io);
+///
+/// // The access is performed using `readl_relaxed` instead of `readl`.
+/// let v = relaxed_io.read32(0x10);
+/// }
+///
+/// ```
+#[repr(transparent)]
+pub struct RelaxedMmio<'a, const SIZE: usize = 0>(&'a Mmio<SIZE>);
+
+impl<'a, const SIZE: usize> From<&'a Mmio<SIZE>> for RelaxedMmio<'a, SIZE> {
+ fn from(value: &'a Mmio<SIZE>) -> Self {
+ Self(value)
+ }
+}
+
+impl<'a, const SIZE: usize> Io for RelaxedMmio<'a, SIZE> {
+ #[inline]
+ fn addr(&self) -> usize {
+ self.0.addr()
+ }
+
+ #[inline]
+ fn maxsize(&self) -> usize {
+ self.0.maxsize()
+ }
+}
+
+impl<'a, const SIZE: usize> IoKnownSize for RelaxedMmio<'a, SIZE> {
+ const MIN_SIZE: usize = SIZE;
+}
+
+// MMIO regions support 8, 16, and 32-bit accesses.
+impl_mmio_io_capable!(RelaxedMmio<'a>, u8, readb_relaxed, writeb_relaxed);
+impl_mmio_io_capable!(RelaxedMmio<'a>, u16, readw_relaxed, writew_relaxed);
+impl_mmio_io_capable!(RelaxedMmio<'a>, u32, readl_relaxed, writel_relaxed);
+// MMIO regions on 64-bit systems also support 64-bit accesses.
+impl_mmio_io_capable!(
+ RelaxedMmio<'a>,
+ #[cfg(CONFIG_64BIT)]
+ u64,
+ readq_relaxed,
+ writeq_relaxed
+);
--
2.52.0On Mon Feb 2, 2026 at 8:13 AM GMT, Alexandre Courbot wrote:
> Relaxed I/O accessors for `Mmio` are currently implemented as an extra
> set of methods that mirror the ones defined in `Io`, but with the
> `_relaxed` suffix.
>
> This makes these methods impossible to use with generic code, which is a
> highly plausible proposition now that we have the `Io` trait.
>
> Address this by adding a new `RelaxedMmio` wrapper type for `Mmio` that
> provides its own `IoCapable` implementations relying on the relaxed C
> accessors. This makes it possible to use relaxed operations on a `Mmio`
> simply by wrapping it, and to use `RelaxedMmio` in code generic against
> `Io`.
Hi Alex,
I think ultimately choice of order to use for each I/O access is local to the
specific access, not a global property.
I know you can just do `RelaxedMmio::from(io).access()` for each single access
too, but it feels quite verbose.
I guess one alternative design is explicit order on the access, e.g.
io.read32(Relaxed)
Or
io.read32(Full)
however this is verbose in some other ways... I'd like to hear how Boqun thinks
on this one.
>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
> rust/kernel/io.rs | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++++--
> 1 file changed, 64 insertions(+), 2 deletions(-)
>
> diff --git a/rust/kernel/io.rs b/rust/kernel/io.rs
> index dc894a45bbcc..baa8d3baa20c 100644
> --- a/rust/kernel/io.rs
> +++ b/rust/kernel/io.rs
> @@ -556,9 +556,15 @@ fn io_addr_assert<U>(&self, offset: usize) -> usize {
>
> /// Implements [`IoCapable`] on `$mmio` for `$ty` using `$read_fn` and `$write_fn`.
> macro_rules! impl_mmio_io_capable {
> - ($mmio:ident, $(#[$attr:meta])* $ty:ty, $read_fn:ident, $write_fn:ident) => {
> + (
> + $mmio:ident $(< $($generics:tt),+ >)*,
> + $(#[$attr:meta])* $ty:ty,
> + $read_fn:ident, $write_fn:ident
> + ) => {
> $(#[$attr])*
> - impl<const SIZE: usize> IoCapable<$ty> for $mmio<SIZE> {
> + impl<$($($generics),+,)* const SIZE: usize> IoCapable<$ty>
> + for $mmio<$($($generics),+,)* SIZE>
> + {
> unsafe fn io_read(&self, address: usize) -> $ty {
> // SAFETY: By the trait invariant `address` is a valid address for MMIO operations.
> unsafe { bindings::$read_fn(address as *const c_void) }
> @@ -695,3 +701,59 @@ pub unsafe fn from_raw(raw: &MmioRaw<SIZE>) -> &Self {
> call_mmio_write(writeq_relaxed) <- u64
> );
> }
> +
> +/// [`Mmio`] wrapper using relaxed accessors.
> +///
> +/// This provides an implementation of [`Io`] that uses relaxed I/O MMIO operands instead of the
> +/// regular ones.
> +///
> +/// # Examples
> +///
> +/// ```no_run
> +/// use kernel::io::{Io, Mmio, RelaxedMmio};
> +///
> +/// fn do_io(io: &Mmio<0x100>) {
> +/// let relaxed_io = RelaxedMmio::from(io);
> +///
> +/// // The access is performed using `readl_relaxed` instead of `readl`.
> +/// let v = relaxed_io.read32(0x10);
> +/// }
> +///
> +/// ```
> +#[repr(transparent)]
> +pub struct RelaxedMmio<'a, const SIZE: usize = 0>(&'a Mmio<SIZE>);
For a transparent wrapper, it should be
#[repr(transparent)]
pub struct RelaxedMmio<const SIZE: usize = 0>(Mmio<SIZE>);
Then the construction is
fn from(value: &'a Mmio<SIZE>) -> &'a RelaxedMmio<SIZE> {
unsafe { core::mem::transmute(value) }
}
unfortunately this require unsafe (perhaps can be helped with macros that
auto-generate this for transparent wrappers?), but this has the benefit that you
get a reference and everything works without indirection (with your approach,
I/O methods take `&RelaxedMmio<'a, SIZE>` and it double dereferencing). This
also mean that you can copy the type or reborrow it.
Best,
Gary
> +
> +impl<'a, const SIZE: usize> From<&'a Mmio<SIZE>> for RelaxedMmio<'a, SIZE> {
> + fn from(value: &'a Mmio<SIZE>) -> Self {
> + Self(value)
> + }
> +}
> +
> +impl<'a, const SIZE: usize> Io for RelaxedMmio<'a, SIZE> {
> + #[inline]
> + fn addr(&self) -> usize {
> + self.0.addr()
> + }
> +
> + #[inline]
> + fn maxsize(&self) -> usize {
> + self.0.maxsize()
> + }
> +}
> +
> +impl<'a, const SIZE: usize> IoKnownSize for RelaxedMmio<'a, SIZE> {
> + const MIN_SIZE: usize = SIZE;
> +}
> +
> +// MMIO regions support 8, 16, and 32-bit accesses.
> +impl_mmio_io_capable!(RelaxedMmio<'a>, u8, readb_relaxed, writeb_relaxed);
> +impl_mmio_io_capable!(RelaxedMmio<'a>, u16, readw_relaxed, writew_relaxed);
> +impl_mmio_io_capable!(RelaxedMmio<'a>, u32, readl_relaxed, writel_relaxed);
> +// MMIO regions on 64-bit systems also support 64-bit accesses.
> +impl_mmio_io_capable!(
> + RelaxedMmio<'a>,
> + #[cfg(CONFIG_64BIT)]
> + u64,
> + readq_relaxed,
> + writeq_relaxed
> +);
On Mon Feb 2, 2026 at 3:07 PM CET, Gary Guo wrote: > I think ultimately choice of order to use for each I/O access is local to the > specific access, not a global property. > > I know you can just do `RelaxedMmio::from(io).access()` for each single access > too, but it feels quite verbose. mmio.relaxed().access() would work as well. > I guess one alternative design is explicit order on the access, e.g. > > io.read32(Relaxed) > > Or > > io.read32(Full) > > however this is verbose in some other ways... I'd like to hear how Boqun thinks > on this one. This apprach would be misleading for a lot of other I/O backends. For instance, the I2C bus has no relaxed ordering.
On Mon Feb 2, 2026 at 2:18 PM GMT, Danilo Krummrich wrote: > On Mon Feb 2, 2026 at 3:07 PM CET, Gary Guo wrote: >> I think ultimately choice of order to use for each I/O access is local to the >> specific access, not a global property. >> >> I guess one alternative design is explicit order on the access, e.g. >> >> io.read32(Relaxed) >> >> Or >> >> io.read32(Full) >> >> however this is verbose in some other ways... I'd like to hear how Boqun thinks >> on this one. > > This apprach would be misleading for a lot of other I/O backends. For instance, > the I2C bus has no relaxed ordering. This is a fair point. >> >> I know you can just do `RelaxedMmio::from(io).access()` for each single access >> too, but it feels quite verbose. > > mmio.relaxed().access() would work as well. Indeed, this looks nice. Best, Gary
On Mon Feb 2, 2026 at 11:27 PM JST, Gary Guo wrote: > On Mon Feb 2, 2026 at 2:18 PM GMT, Danilo Krummrich wrote: >> On Mon Feb 2, 2026 at 3:07 PM CET, Gary Guo wrote: >>> I think ultimately choice of order to use for each I/O access is local to the >>> specific access, not a global property. >>> >>> I guess one alternative design is explicit order on the access, e.g. >>> >>> io.read32(Relaxed) >>> >>> Or >>> >>> io.read32(Full) >>> >>> however this is verbose in some other ways... I'd like to hear how Boqun thinks >>> on this one. >> >> This apprach would be misleading for a lot of other I/O backends. For instance, >> the I2C bus has no relaxed ordering. > > This is a fair point. > >>> >>> I know you can just do `RelaxedMmio::from(io).access()` for each single access >>> too, but it feels quite verbose. >> >> mmio.relaxed().access() would work as well. > > Indeed, this looks nice. Yup, along with the proper wrapper layout that Gary mentioned that looks really nice and flows well within the code. I'll wait some more for more feedback and send v2 if there are no objections about the general direction of the patchset.
On Mon Feb 2, 2026 at 3:18 PM CET, Danilo Krummrich wrote: > On Mon Feb 2, 2026 at 3:07 PM CET, Gary Guo wrote: >> I think ultimately choice of order to use for each I/O access is local to the >> specific access, not a global property. >> >> I know you can just do `RelaxedMmio::from(io).access()` for each single access >> too, but it feels quite verbose. > > mmio.relaxed().access() would work as well. > >> I guess one alternative design is explicit order on the access, e.g. >> >> io.read32(Relaxed) >> >> Or >> >> io.read32(Full) >> >> however this is verbose in some other ways... I'd like to hear how Boqun thinks >> on this one. > > This apprach would be misleading for a lot of other I/O backends. For instance, > the I2C bus has no relaxed ordering. Forgot to mention, relaxed ordering accesses are far less common, hence this would become unnecessarily verbose.
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