On SM8250 Iris core requires two power rails to function, MX (for PLLs)
and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts:
qcom: sm8250: Add venus DT node") added only MX power rail, but,
strangely enough, using MMCX voltage levels.
Add MMCX domain together with the (more correct) MX OPP levels.
Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node")
Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 980d6e894b9d..531470506809 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4321,8 +4321,12 @@ venus: video-codec@aa00000 {
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&videocc MVS0C_GDSC>,
<&videocc MVS0_GDSC>,
- <&rpmhpd RPMHPD_MX>;
- power-domain-names = "venus", "vcodec0", "mx";
+ <&rpmhpd RPMHPD_MX>,
+ <&rpmhpd RPMHPD_MMCX>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mx",
+ "mmcx";
operating-points-v2 = <&venus_opp_table>;
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
@@ -4348,22 +4352,26 @@ venus_opp_table: opp-table {
opp-720000000 {
opp-hz = /bits/ 64 <720000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
};
opp-1014000000 {
opp-hz = /bits/ 64 <1014000000>;
- required-opps = <&rpmhpd_opp_svs>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_svs>;
};
opp-1098000000 {
opp-hz = /bits/ 64 <1098000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs_l1>;
};
opp-1332000000 {
opp-hz = /bits/ 64 <1332000000>;
- required-opps = <&rpmhpd_opp_nom>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_nom>;
};
};
};
--
2.47.3
On 2/1/26 11:49 AM, Dmitry Baryshkov wrote:
> On SM8250 Iris core requires two power rails to function, MX (for PLLs)
> and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts:
> qcom: sm8250: Add venus DT node") added only MX power rail, but,
> strangely enough, using MMCX voltage levels.
>
> Add MMCX domain together with the (more correct) MX OPP levels.
>
> Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node")
> Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
I noticed that the subject lacks an '8250'
Konrad
On 2/1/2026 4:19 PM, Dmitry Baryshkov wrote:
> On SM8250 Iris core requires two power rails to function, MX (for PLLs)
> and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts:
> qcom: sm8250: Add venus DT node") added only MX power rail, but,
> strangely enough, using MMCX voltage levels.
>
> Add MMCX domain together with the (more correct) MX OPP levels.
>
> Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node")
> Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++------
> 1 file changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 980d6e894b9d..531470506809 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -4321,8 +4321,12 @@ venus: video-codec@aa00000 {
> interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> power-domains = <&videocc MVS0C_GDSC>,
> <&videocc MVS0_GDSC>,
> - <&rpmhpd RPMHPD_MX>;
> - power-domain-names = "venus", "vcodec0", "mx";
> + <&rpmhpd RPMHPD_MX>,
> + <&rpmhpd RPMHPD_MMCX>;
> + power-domain-names = "venus",
> + "vcodec0",
> + "mx",
> + "mmcx";
> operating-points-v2 = <&venus_opp_table>;
>
> clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> @@ -4348,22 +4352,26 @@ venus_opp_table: opp-table {
>
> opp-720000000 {
> opp-hz = /bits/ 64 <720000000>;
> - required-opps = <&rpmhpd_opp_low_svs>;
> + required-opps = <&rpmhpd_opp_low_svs>,
should be rpmhpd_opp_svs for MX for PLL to get voted to 720000000.
> + <&rpmhpd_opp_low_svs>;
> };
>
> opp-1014000000 {
> opp-hz = /bits/ 64 <1014000000>;
> - required-opps = <&rpmhpd_opp_svs>;
> + required-opps = <&rpmhpd_opp_low_svs>,
should be rpmhpd_opp_svs for MX
> + <&rpmhpd_opp_svs>;
> };
>
> opp-1098000000 {
> opp-hz = /bits/ 64 <1098000000>;
> - required-opps = <&rpmhpd_opp_svs_l1>;
> + required-opps = <&rpmhpd_opp_svs>,
should be rpmhpd_opp_svs_l1 for MX, SVS can only go upto 1066.
> + <&rpmhpd_opp_svs_l1>;
> };
>
> opp-1332000000 {
> opp-hz = /bits/ 64 <1332000000>;
> - required-opps = <&rpmhpd_opp_nom>;
> + required-opps = <&rpmhpd_opp_svs>,
should be rpmhpd_opp_svs_l1 for MX, which can go upto 1500.
Thanks,
Dikshita
> + <&rpmhpd_opp_nom>;
> };
> };
> };
>
On Tue, Feb 03, 2026 at 02:37:16PM +0530, Dikshita Agarwal wrote:
>
>
> On 2/1/2026 4:19 PM, Dmitry Baryshkov wrote:
> > On SM8250 Iris core requires two power rails to function, MX (for PLLs)
> > and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts:
> > qcom: sm8250: Add venus DT node") added only MX power rail, but,
> > strangely enough, using MMCX voltage levels.
> >
> > Add MMCX domain together with the (more correct) MX OPP levels.
> >
> > Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node")
> > Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++------
> > 1 file changed, 14 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > index 980d6e894b9d..531470506809 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > @@ -4321,8 +4321,12 @@ venus: video-codec@aa00000 {
> > interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> > power-domains = <&videocc MVS0C_GDSC>,
> > <&videocc MVS0_GDSC>,
> > - <&rpmhpd RPMHPD_MX>;
> > - power-domain-names = "venus", "vcodec0", "mx";
> > + <&rpmhpd RPMHPD_MX>,
> > + <&rpmhpd RPMHPD_MMCX>;
> > + power-domain-names = "venus",
> > + "vcodec0",
> > + "mx",
> > + "mmcx";
> > operating-points-v2 = <&venus_opp_table>;
> >
> > clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> > @@ -4348,22 +4352,26 @@ venus_opp_table: opp-table {
> >
> > opp-720000000 {
> > opp-hz = /bits/ 64 <720000000>;
> > - required-opps = <&rpmhpd_opp_low_svs>;
> > + required-opps = <&rpmhpd_opp_low_svs>,
>
> should be rpmhpd_opp_svs for MX for PLL to get voted to 720000000.
Ack, thanks!
>
> > + <&rpmhpd_opp_low_svs>;
> > };
> >
--
With best wishes
Dmitry
On 2/1/26 11:49 AM, Dmitry Baryshkov wrote:
> On SM8250 Iris core requires two power rails to function, MX (for PLLs)
> and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts:
> qcom: sm8250: Add venus DT node") added only MX power rail, but,
> strangely enough, using MMCX voltage levels.
>
> Add MMCX domain together with the (more correct) MX OPP levels.
>
> Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node")
> Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
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