As the (kernel-internally) OF-based MIPS Loongson-3 systems can also
have PCH LPC interrupt controller, add OF-based initialization code for
the driver.
Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
---
drivers/irqchip/irq-loongson-pch-lpc.c | 28 ++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/irqchip/irq-loongson-pch-lpc.c b/drivers/irqchip/irq-loongson-pch-lpc.c
index 96489e031d34e..0baa93028abf4 100644
--- a/drivers/irqchip/irq-loongson-pch-lpc.c
+++ b/drivers/irqchip/irq-loongson-pch-lpc.c
@@ -13,6 +13,8 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <linux/syscore_ops.h>
#include "irq-loongson.h"
@@ -257,3 +259,29 @@ int __init pch_lpc_acpi_init(struct irq_domain *parent,
return 0;
}
#endif /* CONFIG_ACPI */
+
+#ifdef CONFIG_OF
+static int pch_lpc_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ int parent_irq;
+ struct fwnode_handle *irq_handle;
+ struct resource res;
+
+ if (of_address_to_resource(node, 0, &res))
+ return -EINVAL;
+
+ parent_irq = irq_of_parse_and_map(node, 0);
+ if (!parent_irq) {
+ pr_err("Failed to get the parent IRQ for LPC IRQs\n");
+ return -EINVAL;
+ }
+
+ irq_handle = of_fwnode_handle(node);
+
+ return pch_lpc_init(res.start, resource_size(&res), irq_handle,
+ parent_irq);
+}
+
+IRQCHIP_DECLARE(pch_lpc, "loongson,pch-lpc-1.0", pch_lpc_of_init);
+#endif /* CONFIG_OF */
--
2.52.0Hi Icenowy, kernel test robot noticed the following build warnings: [auto build test WARNING on tip/irq/core] [also build test WARNING on robh/for-next krzk/for-next krzk-dt/for-next krzk-mem-ctrl/for-next linus/master v6.19-rc7 next-20260130] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Icenowy-Zheng/genirq-reserve-NR_IRQS_LEGACY-IRQs-in-dynirq-by-default/20260131-175403 base: tip/irq/core patch link: https://lore.kernel.org/r/20260131094547.455916-6-zhengxingda%40iscas.ac.cn patch subject: [PATCH 5/8] irqchip/loongson-pch-lpc: add OF init code config: loongarch-randconfig-001-20260201 (https://download.01.org/0day-ci/archive/20260202/202602020835.BnVM9ELe-lkp@intel.com/config) compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 9b8addffa70cee5b2acc5454712d9cf78ce45710) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260202/202602020835.BnVM9ELe-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202602020835.BnVM9ELe-lkp@intel.com/ All warnings (new ones prefixed by >>, old ones prefixed by <<): >> WARNING: modpost: vmlinux: section mismatch in reference: pch_lpc_of_init+0x7c (section: .text.pch_lpc_of_init) -> pch_lpc_init (section: .init.text) Kconfig warnings: (for reference only) WARNING: unmet direct dependencies detected for CAN_DEV Depends on [n]: NETDEVICES [=n] && CAN [=y] Selected by [y]: - CAN [=y] && NET [=y] -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
On Sat, Jan 31 2026 at 17:45, Icenowy Zheng wrote:
> As the (kernel-internally) OF-based MIPS Loongson-3 systems can also
What are kernel-internally systems?
> have PCH LPC interrupt controller, add OF-based initialization code for
have a ... controller.
Add OF ....
> +#ifdef CONFIG_OF
> +static int pch_lpc_of_init(struct device_node *node,
> + struct device_node *parent)
No line break required.
> +{
> + int parent_irq;
> + struct fwnode_handle *irq_handle;
> + struct resource res;
Variable ordering.
> + if (of_address_to_resource(node, 0, &res))
> + return -EINVAL;
> +
> + parent_irq = irq_of_parse_and_map(node, 0);
> + if (!parent_irq) {
> + pr_err("Failed to get the parent IRQ for LPC IRQs\n");
> + return -EINVAL;
> + }
> +
> + irq_handle = of_fwnode_handle(node);
> +
> + return pch_lpc_init(res.start, resource_size(&res), irq_handle,
> + parent_irq);
If pch_lpc_init() fails the parent interrupt mapping is leaked, no?
Thanks,
tglx
在 2026-02-01星期日的 17:19 +0100，Thomas Gleixner写道：
> On Sat, Jan 31 2026 at 17:45, Icenowy Zheng wrote:
>
> > As the (kernel-internally) OF-based MIPS Loongson-3 systems can
> > also
>
> What are kernel-internally systems?
I mean kernel-internally-OF-based. These devices' firmware does not
ship DT, but Linux kernel ships some DTs and pick one by arch code.
Do you have any suggestions for rewording to make this more clear? Or
should I just stop to mention this implementaion detail?
>
> > have PCH LPC interrupt controller, add OF-based initialization code
> > for
>
> have a ... controller.
>
> Add OF ....
>
> > +#ifdef CONFIG_OF
> > +static int pch_lpc_of_init(struct device_node *node,
> > + struct device_node *parent)
>
> No line break required.
>
> > +{
> > + int parent_irq;
> > + struct fwnode_handle *irq_handle;
> > + struct resource res;
>
> Variable ordering.
Is there any rule for the ordering?
>
> > + if (of_address_to_resource(node, 0, &res))
> > + return -EINVAL;
> > +
> > + parent_irq = irq_of_parse_and_map(node, 0);
> > + if (!parent_irq) {
> > + pr_err("Failed to get the parent IRQ for LPC
> > IRQs\n");
> > + return -EINVAL;
> > + }
> > +
> > + irq_handle = of_fwnode_handle(node);
> > +
> > + return pch_lpc_init(res.start, resource_size(&res),
> > irq_handle,
> > + parent_irq);
>
> If pch_lpc_init() fails the parent interrupt mapping is leaked, no?
I don't know any reverse operation for irq_of_parse_and_map(), and most
implementations I see has no cleanup codepath for this parent IRQ.
Thanks,
Icenowy
>
> Thanks,
>
> tglx
On Mon, Feb 02 2026 at 13:50, Icenowy Zheng wrote:
> 在 2026-02-01星期日的 17:19 +0100，Thomas Gleixner写道：
>> On Sat, Jan 31 2026 at 17:45, Icenowy Zheng wrote:
>>
>> > As the (kernel-internally) OF-based MIPS Loongson-3 systems can
>> > also
>>
>> What are kernel-internally systems?
>
> I mean kernel-internally-OF-based. These devices' firmware does not
> ship DT, but Linux kernel ships some DTs and pick one by arch code.
>
> Do you have any suggestions for rewording to make this more clear? Or
> should I just stop to mention this implementaion detail?
It's irrelevant for the driver where the device tree comes from, no?
>> > +{
>> > + int parent_irq;
>> > + struct fwnode_handle *irq_handle;
>> > + struct resource res;
>>
>> Variable ordering.
>
> Is there any rule for the ordering?
I gave you the link in the other reply.
>> If pch_lpc_init() fails the parent interrupt mapping is leaked, no?
>
> I don't know any reverse operation for irq_of_parse_and_map(), and most
irq_dispose_mapping()
> implementations I see has no cleanup codepath for this parent IRQ.
You looked at the wrong drivers then :)
Hi, Icenowy,
On Sat, Jan 31, 2026 at 5:46 PM Icenowy Zheng <zhengxingda@iscas.ac.cn> wrote:
>
> As the (kernel-internally) OF-based MIPS Loongson-3 systems can also
> have PCH LPC interrupt controller, add OF-based initialization code for
> the driver.
I think Patch-3/4/5 can be combined to a single one.
Huacai
>
> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
> ---
> drivers/irqchip/irq-loongson-pch-lpc.c | 28 ++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/irqchip/irq-loongson-pch-lpc.c b/drivers/irqchip/irq-loongson-pch-lpc.c
> index 96489e031d34e..0baa93028abf4 100644
> --- a/drivers/irqchip/irq-loongson-pch-lpc.c
> +++ b/drivers/irqchip/irq-loongson-pch-lpc.c
> @@ -13,6 +13,8 @@
> #include <linux/irqchip/chained_irq.h>
> #include <linux/irqdomain.h>
> #include <linux/kernel.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> #include <linux/syscore_ops.h>
>
> #include "irq-loongson.h"
> @@ -257,3 +259,29 @@ int __init pch_lpc_acpi_init(struct irq_domain *parent,
> return 0;
> }
> #endif /* CONFIG_ACPI */
> +
> +#ifdef CONFIG_OF
> +static int pch_lpc_of_init(struct device_node *node,
> + struct device_node *parent)
> +{
> + int parent_irq;
> + struct fwnode_handle *irq_handle;
> + struct resource res;
> +
> + if (of_address_to_resource(node, 0, &res))
> + return -EINVAL;
> +
> + parent_irq = irq_of_parse_and_map(node, 0);
> + if (!parent_irq) {
> + pr_err("Failed to get the parent IRQ for LPC IRQs\n");
> + return -EINVAL;
> + }
> +
> + irq_handle = of_fwnode_handle(node);
> +
> + return pch_lpc_init(res.start, resource_size(&res), irq_handle,
> + parent_irq);
> +}
> +
> +IRQCHIP_DECLARE(pch_lpc, "loongson,pch-lpc-1.0", pch_lpc_of_init);
> +#endif /* CONFIG_OF */
> --
> 2.52.0
>
On Sun, Feb 01 2026 at 10:33, Huacai Chen wrote:
> Hi, Icenowy,
>
> On Sat, Jan 31, 2026 at 5:46 PM Icenowy Zheng <zhengxingda@iscas.ac.cn> wrote:
>>
>> As the (kernel-internally) OF-based MIPS Loongson-3 systems can also
>> have PCH LPC interrupt controller, add OF-based initialization code for
>> the driver.
> I think Patch-3/4/5 can be combined to a single one.
No. #3 should be separate, but #4/#5 combined. It's easier to review the code
rework and the new code separately.
Thanks,
tglx
Hi Icenowy, kernel test robot noticed the following build warnings: [auto build test WARNING on tip/irq/core] [also build test WARNING on robh/for-next krzk/for-next krzk-dt/for-next krzk-mem-ctrl/for-next linus/master v6.19-rc7 next-20260130] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Icenowy-Zheng/genirq-reserve-NR_IRQS_LEGACY-IRQs-in-dynirq-by-default/20260131-175403 base: tip/irq/core patch link: https://lore.kernel.org/r/20260131094547.455916-6-zhengxingda%40iscas.ac.cn patch subject: [PATCH 5/8] irqchip/loongson-pch-lpc: add OF init code config: loongarch-allnoconfig (https://download.01.org/0day-ci/archive/20260201/202602010337.D6tyoDtw-lkp@intel.com/config) compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 9b8addffa70cee5b2acc5454712d9cf78ce45710) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260201/202602010337.D6tyoDtw-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202602010337.D6tyoDtw-lkp@intel.com/ All warnings (new ones prefixed by >>, old ones prefixed by <<): >> WARNING: modpost: vmlinux: section mismatch in reference: pch_lpc_of_init+0xa8 (section: .text) -> pch_lpc_init (section: .init.text) -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
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