[PATCH v4 12/19] dt-bindings: dma: ti: Add K3 BCDMA V2

Sai Sree Kartheek Adivi posted 19 patches 1 week, 3 days ago
[PATCH v4 12/19] dt-bindings: dma: ti: Add K3 BCDMA V2
Posted by Sai Sree Kartheek Adivi 1 week, 3 days ago
New binding document for
Texas Instruments K3 Block Copy DMA (BCDMA) V2.

BCDMA V2 is introduced as part of AM62L.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sai Sree Kartheek Adivi <s-adivi@ti.com>
---
 .../bindings/dma/ti/ti,k3-bcdma-v2.yaml       | 116 ++++++++++++++++++
 1 file changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml

diff --git a/Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml b/Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml
new file mode 100644
index 0000000000000..b0bfb19ba863a
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2024-2025 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/ti/ti,k3-bcdma-v2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 DMSS BCDMA V2
+
+maintainers:
+  - Sai Sree Kartheek Adivi <s-adivi@ti.com>
+
+description: |
+  The BCDMA V2 is intended to perform similar functions as the TR mode channels
+  of K3 UDMA-P. BCDMA V2 includes block copy channels and Split channels.
+
+  Block copy channels mainly used for memory to memory transfers, but with
+  optional triggers a block copy channel can service peripherals by accessing
+  directly to memory mapped registers or area.
+
+  Split channels can be used to service PSI-L based peripherals. The peripherals
+  can be PSI-L native or legacy, non PSI-L native peripherals with PDMAs. PDMA
+  is tasked to act as a bridge between the PSI-L fabric and the legacy peripheral.
+
+allOf:
+  - $ref: /schemas/dma/dma-controller.yaml#
+
+properties:
+  compatible:
+    const: ti,am62l-dmss-bcdma
+
+  reg:
+    items:
+      - description: BCDMA Control /Status
+      - description: Block Copy Channel Realtime
+      - description: Channel Realtime
+      - description: Ring Realtime
+
+  reg-names:
+    items:
+      - const: gcfg
+      - const: bchanrt
+      - const: chanrt
+      - const: ringrt
+
+  "#dma-cells":
+    const: 4
+    description: |
+      cell 1: Channel operation mode
+        0 - split channel / no trigger
+        1 - internal channel event
+        2 - external signal
+        3 - timer manager event
+
+      cell 2: parameter for the trigger:
+        if cell 1 is 0 (disable / no trigger):
+          Unused, ignored
+        if cell 1 is 1 (internal channel event):
+          channel number whose TR event should trigger the current channel.
+        if cell 1 is 2 or 3 (external signal or timer manager event):
+          index of global interfaces that come into the DMA.
+
+          Please refer to the device documentation for global interface indexes.
+
+      cell 3: Channel identification for the peripheral
+        if cell 1 is 0 (split channel / no trigger):
+          PSI-L thread ID of the remote (to BCDMA) end.
+          Valid ranges for thread ID depends on the data movement direction:
+          for source thread IDs (rx): 0 - 0x7fff
+          for destination thread IDs (tx): 0x8000 - 0xffff
+
+          Please refer to the device documentation for the PSI-L thread map and
+          also the PSI-L peripheral chapter for the correct thread ID.
+
+        if cell 1 is 1 or 2 or 3 (MEM_TO_MEM and/or trigger type):
+          Unused, provide 0.
+
+      cell 4: ASEL value for the channel
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - "#dma-cells"
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    main {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        main_bcdma: dma-controller@485c4000 {
+            compatible = "ti,am62l-dmss-bcdma";
+            reg = <0x00 0x485c4000 0x00 0x4000>,
+                  <0x00 0x48880000 0x00 0x10000>,
+                  <0x00 0x48800000 0x00 0x80000>,
+                  <0x00 0x47000000 0x00 0x200000>;
+            reg-names = "gcfg", "bchanrt", "chanrt", "ringrt";
+            #dma-cells = <4>;
+        };
+
+        crypto@40800000 {
+            compatible = "ti,am62l-dthev2";
+            reg = <0x00 0x40800000 0x00 0x14000>;
+
+            dmas = <&main_bcdma 0 0 0x4700 0>,
+                   /* rx: Split channel, no trigger, PSI-L thread id, ASEL value */
+                   <&main_bcdma 0 0 0xc701 0>,
+                   /* tx1: Split channel, no trigger, PSI-L thread id, ASEL value */
+                   <&main_bcdma 0 0 0xc700 0>;
+                   /* tx2: Split channel, no trigger, PSI-L thread id, ASEL value */
+            dma-names = "rx", "tx1", "tx2";
+        };
+    };
-- 
2.34.1
Re: [PATCH v4 12/19] dt-bindings: dma: ti: Add K3 BCDMA V2
Posted by Krzysztof Kozlowski 4 days, 2 hours ago
On 30/01/2026 12:01, Sai Sree Kartheek Adivi wrote:
> New binding document for
> Texas Instruments K3 Block Copy DMA (BCDMA) V2.
> 
> BCDMA V2 is introduced as part of AM62L.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

NAK, you ignored my review

...

> +
> +        crypto@40800000 {
> +            compatible = "ti,am62l-dthev2";

NAK, you already received review. You cannot add more things here in hiding.


> +            reg = <0x00 0x40800000 0x00 0x14000>;
> +
> +            dmas = <&main_bcdma 0 0 0x4700 0>,
> +                   /* rx: Split channel, no trigger, PSI-L thread id, ASEL value */
> +                   <&main_bcdma 0 0 0xc701 0>,
> +                   /* tx1: Split channel, no trigger, PSI-L thread id, ASEL value */
> +                   <&main_bcdma 0 0 0xc700 0>;
> +                   /* tx2: Split channel, no trigger, PSI-L thread id, ASEL value */
> +            dma-names = "rx", "tx1", "tx2";
> +        };
> +    };


Best regards,
Krzysztof
Re: [PATCH v4 12/19] dt-bindings: dma: ti: Add K3 BCDMA V2
Posted by Frank Li 1 week, 2 days ago
On Fri, Jan 30, 2026 at 04:31:52PM +0530, Sai Sree Kartheek Adivi wrote:
> New binding document for
> Texas Instruments K3 Block Copy DMA (BCDMA) V2.
>
> BCDMA V2 is introduced as part of AM62L.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Sai Sree Kartheek Adivi <s-adivi@ti.com>
> ---
>  .../bindings/dma/ti/ti,k3-bcdma-v2.yaml       | 116 ++++++++++++++++++
>  1 file changed, 116 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml b/Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml
> new file mode 100644
> index 0000000000000..b0bfb19ba863a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/ti/ti,k3-bcdma-v2.yaml
> @@ -0,0 +1,116 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2024-2025 Texas Instruments Incorporated
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/ti/ti,k3-bcdma-v2.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments K3 DMSS BCDMA V2
> +
> +maintainers:
> +  - Sai Sree Kartheek Adivi <s-adivi@ti.com>
> +
> +description: |
> +  The BCDMA V2 is intended to perform similar functions as the TR mode channels
> +  of K3 UDMA-P. BCDMA V2 includes block copy channels and Split channels.
> +
> +  Block copy channels mainly used for memory to memory transfers, but with
> +  optional triggers a block copy channel can service peripherals by accessing
> +  directly to memory mapped registers or area.
> +
> +  Split channels can be used to service PSI-L based peripherals. The peripherals
> +  can be PSI-L native or legacy, non PSI-L native peripherals with PDMAs. PDMA
> +  is tasked to act as a bridge between the PSI-L fabric and the legacy peripheral.
> +
> +allOf:
> +  - $ref: /schemas/dma/dma-controller.yaml#
> +
> +properties:
> +  compatible:
> +    const: ti,am62l-dmss-bcdma
> +
> +  reg:
> +    items:
> +      - description: BCDMA Control /Status
> +      - description: Block Copy Channel Realtime
> +      - description: Channel Realtime
> +      - description: Ring Realtime
> +
> +  reg-names:
> +    items:
> +      - const: gcfg
> +      - const: bchanrt
> +      - const: chanrt
> +      - const: ringrt
> +
> +  "#dma-cells":
> +    const: 4

look like only this difference compare v3. can you consider to combine to
one file

Frank
> +    description: |
> +      cell 1: Channel operation mode
> +        0 - split channel / no trigger
> +        1 - internal channel event
> +        2 - external signal
> +        3 - timer manager event
> +
> +      cell 2: parameter for the trigger:
> +        if cell 1 is 0 (disable / no trigger):
> +          Unused, ignored
> +        if cell 1 is 1 (internal channel event):
> +          channel number whose TR event should trigger the current channel.
> +        if cell 1 is 2 or 3 (external signal or timer manager event):
> +          index of global interfaces that come into the DMA.
> +
> +          Please refer to the device documentation for global interface indexes.
> +
> +      cell 3: Channel identification for the peripheral
> +        if cell 1 is 0 (split channel / no trigger):
> +          PSI-L thread ID of the remote (to BCDMA) end.
> +          Valid ranges for thread ID depends on the data movement direction:
> +          for source thread IDs (rx): 0 - 0x7fff
> +          for destination thread IDs (tx): 0x8000 - 0xffff
> +
> +          Please refer to the device documentation for the PSI-L thread map and
> +          also the PSI-L peripheral chapter for the correct thread ID.
> +
> +        if cell 1 is 1 or 2 or 3 (MEM_TO_MEM and/or trigger type):
> +          Unused, provide 0.
> +
> +      cell 4: ASEL value for the channel
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - "#dma-cells"
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    main {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        main_bcdma: dma-controller@485c4000 {
> +            compatible = "ti,am62l-dmss-bcdma";
> +            reg = <0x00 0x485c4000 0x00 0x4000>,
> +                  <0x00 0x48880000 0x00 0x10000>,
> +                  <0x00 0x48800000 0x00 0x80000>,
> +                  <0x00 0x47000000 0x00 0x200000>;
> +            reg-names = "gcfg", "bchanrt", "chanrt", "ringrt";
> +            #dma-cells = <4>;
> +        };
> +
> +        crypto@40800000 {
> +            compatible = "ti,am62l-dthev2";
> +            reg = <0x00 0x40800000 0x00 0x14000>;
> +
> +            dmas = <&main_bcdma 0 0 0x4700 0>,
> +                   /* rx: Split channel, no trigger, PSI-L thread id, ASEL value */
> +                   <&main_bcdma 0 0 0xc701 0>,
> +                   /* tx1: Split channel, no trigger, PSI-L thread id, ASEL value */
> +                   <&main_bcdma 0 0 0xc700 0>;
> +                   /* tx2: Split channel, no trigger, PSI-L thread id, ASEL value */
> +            dma-names = "rx", "tx1", "tx2";
> +        };
> +    };
> --
> 2.34.1
>