drivers/mtd/nand/spi/core.c | 8 ++++++++ 1 file changed, 8 insertions(+)
Macronix serial NAND devices with continuous read support do not
clear the configuration register on soft reset and lack a hardware
reset pin. When continuous read is interrupted (e.g., during reboot),
the feature remains enabled at the device level.
With continuous read enabled, the OOB area becomes inaccessible and
all reads are instead directed to the main area. As a result, during
partition allocation as part of MTD device registration, the first two
bytes of the main area for the master block are read and indicate that
the block is bad. This process repeats for every subsequent block for
the partition.
All reads and writes that reference the BBT find no good blocks and
fail.
The only paths for recovery from this state are triggering the
continuous read feature by way of raw MTD reads or through a NAND
device power drain.
Disable continuous read explicitly during spinand probe to ensure
quiescent feature state.
Fixes: 631cfdd0520d ("mtd: spi-nand: Add continuous read support")
Signed-off-by: David LaPorte <dalaport@amazon.com>
Reviewed-by: Gunnar Kudrjavets <gunnarku@amazon.com>
---
Changes in V2:
- Added comments to explain why cont_read is disabled here
- Link to v1: https://lore.kernel.org/all/20260129221606.35158-1-dalaport@amazon.com/
---
Testing details:
- Instrumented feature enablement and verified fix on internal kernel
v6.12.64 build with affected Macronix MX35UF4GE4AD-Z4I hardware:
warm reboot without patch marks all 2048 blocks bad during partition
allocation; with patch applied, device registers cleanly with no bad
blocks marked
- Patch cherry-picks cleanly to mainline v6.19-rc6 and builds without
warnings
- Boot tested mainline + patch on aarch64 host without SPI interface
---
drivers/mtd/nand/spi/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index d207286572d8..9540fd04156c 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -859,6 +859,14 @@ static void spinand_cont_read_init(struct spinand_device *spinand)
(engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE ||
engine_type == NAND_ECC_ENGINE_TYPE_NONE)) {
spinand->cont_read_possible = true;
+
+ /*
+ * Ensure continuous read is disabled on probe.
+ * Some devices retain this state across soft reset,
+ * which leaves the OOB area inaccessible and results
+ * in false positive returns from spinand_isbad().
+ */
+ spinand_cont_read_enable(spinand, false);
}
}
--
2.43.0
Could you submit the same to u-boot?
On 1/30/26 04:33, David LaPorte wrote:
> [You don't often get email from dalaport@amazon.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Macronix serial NAND devices with continuous read support do not
> clear the configuration register on soft reset and lack a hardware
> reset pin. When continuous read is interrupted (e.g., during reboot),
> the feature remains enabled at the device level.
>
> With continuous read enabled, the OOB area becomes inaccessible and
> all reads are instead directed to the main area. As a result, during
> partition allocation as part of MTD device registration, the first two
> bytes of the main area for the master block are read and indicate that
> the block is bad. This process repeats for every subsequent block for
> the partition.
>
> All reads and writes that reference the BBT find no good blocks and
> fail.
>
> The only paths for recovery from this state are triggering the
> continuous read feature by way of raw MTD reads or through a NAND
> device power drain.
>
> Disable continuous read explicitly during spinand probe to ensure
> quiescent feature state.
>
> Fixes: 631cfdd0520d ("mtd: spi-nand: Add continuous read support")
> Signed-off-by: David LaPorte <dalaport@amazon.com>
> Reviewed-by: Gunnar Kudrjavets <gunnarku@amazon.com>
> ---
> Changes in V2:
> - Added comments to explain why cont_read is disabled here
> - Link to v1: https://lore.kernel.org/all/20260129221606.35158-1-dalaport@amazon.com/
> ---
> Testing details:
> - Instrumented feature enablement and verified fix on internal kernel
> v6.12.64 build with affected Macronix MX35UF4GE4AD-Z4I hardware:
> warm reboot without patch marks all 2048 blocks bad during partition
> allocation; with patch applied, device registers cleanly with no bad
> blocks marked
> - Patch cherry-picks cleanly to mainline v6.19-rc6 and builds without
> warnings
> - Boot tested mainline + patch on aarch64 host without SPI interface
> ---
> drivers/mtd/nand/spi/core.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index d207286572d8..9540fd04156c 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -859,6 +859,14 @@ static void spinand_cont_read_init(struct spinand_device *spinand)
> (engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE ||
> engine_type == NAND_ECC_ENGINE_TYPE_NONE)) {
> spinand->cont_read_possible = true;
> +
> + /*
> + * Ensure continuous read is disabled on probe.
> + * Some devices retain this state across soft reset,
> + * which leaves the OOB area inaccessible and results
> + * in false positive returns from spinand_isbad().
> + */
> + spinand_cont_read_enable(spinand, false);
> }
> }
>
> --
> 2.43.0
>
On Thu, Jan 30, 2026 at 02:21:30PM +0000, Mikhail Kshevetskiy wrote: > Could you submit the same to u-boot? Yes, I'll prepare a patch for u-boot as well. Thanks, David
On Thu, 29 Jan 2026 17:33:22 -0800, David LaPorte wrote:
> Macronix serial NAND devices with continuous read support do not
> clear the configuration register on soft reset and lack a hardware
> reset pin. When continuous read is interrupted (e.g., during reboot),
> the feature remains enabled at the device level.
>
> With continuous read enabled, the OOB area becomes inaccessible and
> all reads are instead directed to the main area. As a result, during
> partition allocation as part of MTD device registration, the first two
> bytes of the main area for the master block are read and indicate that
> the block is bad. This process repeats for every subsequent block for
> the partition.
>
> [...]
Applied to nand/next, thanks!
[1/1] mtd: spinand: Disable continuous read during probe
commit: d47034c840c3965cc51572d69ecf634c908e8fac
Patche(s) should be available on mtd/linux.git and will be
part of the next PR (provided that no robot complains by then).
Kind regards,
Miquèl
On 1/30/26 04:33, David LaPorte wrote:
> [You don't often get email from dalaport@amazon.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Macronix serial NAND devices with continuous read support do not
> clear the configuration register on soft reset and lack a hardware
> reset pin. When continuous read is interrupted (e.g., during reboot),
> the feature remains enabled at the device level.
>
> With continuous read enabled, the OOB area becomes inaccessible and
> all reads are instead directed to the main area. As a result, during
> partition allocation as part of MTD device registration, the first two
> bytes of the main area for the master block are read and indicate that
> the block is bad. This process repeats for every subsequent block for
> the partition.
>
> All reads and writes that reference the BBT find no good blocks and
> fail.
>
> The only paths for recovery from this state are triggering the
> continuous read feature by way of raw MTD reads or through a NAND
> device power drain.
>
> Disable continuous read explicitly during spinand probe to ensure
> quiescent feature state.
>
> Fixes: 631cfdd0520d ("mtd: spi-nand: Add continuous read support")
> Signed-off-by: David LaPorte <dalaport@amazon.com>
> Reviewed-by: Gunnar Kudrjavets <gunnarku@amazon.com>
> ---
> Changes in V2:
> - Added comments to explain why cont_read is disabled here
> - Link to v1: https://lore.kernel.org/all/20260129221606.35158-1-dalaport@amazon.com/
> ---
> Testing details:
> - Instrumented feature enablement and verified fix on internal kernel
> v6.12.64 build with affected Macronix MX35UF4GE4AD-Z4I hardware:
> warm reboot without patch marks all 2048 blocks bad during partition
> allocation; with patch applied, device registers cleanly with no bad
> blocks marked
> - Patch cherry-picks cleanly to mainline v6.19-rc6 and builds without
> warnings
> - Boot tested mainline + patch on aarch64 host without SPI interface
> ---
> drivers/mtd/nand/spi/core.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index d207286572d8..9540fd04156c 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -859,6 +859,14 @@ static void spinand_cont_read_init(struct spinand_device *spinand)
> (engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE ||
> engine_type == NAND_ECC_ENGINE_TYPE_NONE)) {
> spinand->cont_read_possible = true;
> +
> + /*
> + * Ensure continuous read is disabled on probe.
> + * Some devices retain this state across soft reset,
> + * which leaves the OOB area inaccessible and results
> + * in false positive returns from spinand_isbad().
> + */
> + spinand_cont_read_enable(spinand, false);
> }
> }
>
> --
> 2.43.0
>
LGTM,
Reviewed-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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