Dear All,
The HW user manual states that the CA55 cores from the Renesas RZ/V2H(P)
SoC are only allowed access to WDT1, however when WDT support was added
it included all the WDT IPs (WDT0, WDT1, WDT2, and WDT3).
Address this by removing the device tree nodes and clock/reset entries
for WDT{0,2,3}.
Cheers,
Fab
Fabrizio Castro (3):
dt-bindings: watchdog: renesas,r9a09g057-wdt: Rework example
arm64: dts: renesas: r9a09g057: Remove wdt{0,2,3} nodes
clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
.../watchdog/renesas,r9a09g057-wdt.yaml | 8 ++---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 30 -------------------
drivers/clk/renesas/r9a09g057-cpg.c | 15 ----------
3 files changed, 4 insertions(+), 49 deletions(-)
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2.34.1