This modifier is primarily intended to be used by panvk to implement
sparse partially-resident images with better map and unmap
performance, and no worse access performance, compared to
implementing them in terms of U-interleaved.

With this modifier, the plane is divided into 64k byte 1:1 or 2:1
-sided tiles. The 64k tiles are laid out linearly. Each 64k tile
is divided into blocks of 16x16 texel blocks each, which themselves
are laid out linearly within a 64k tile. Then within each such
16x16 block, texel blocks are laid out according to U order,
similar to 16X16_BLOCK_U_INTERLEAVED.

Unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not depend on
whether a format is compressed or not.

The hardware features corresponding to this modifier are available
starting with v10 (second gen Valhall.)

The corresponding panvk MR can be found at:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38986

Previous version:
https://lists.freedesktop.org/archives/dri-devel/2026-January/547072.html

No changes since v2

Changes since v1:

* Rewrite the description of the modifier to be hopefully unambiguous.

Signed-off-by: Caterina Shablia <caterina.shablia@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
---
 include/uapi/drm/drm_fourcc.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index e527b24bd824..452f901513ad 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -1422,6 +1422,22 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
 #define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \
 	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL)
 
+/*
+ * ARM 64k interleaved modifier
+ *
+ * This is used by ARM Mali v10+ GPUs. With this modifier, the plane is divided
+ * into 64k byte 1:1 or 2:1 -sided tiles. The 64k tiles are laid out linearly.
+ * Each 64k tile is divided into blocks of 16x16 texel blocks, which are
+ * themselves laid out linearly within a 64k tile. Then within each 16x16
+ * block, texel blocks are laid out according to U order, similar to
+ * 16X16_BLOCK_U_INTERLEAVED.
+ *
+ * Note that unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not change
+ * depending on whether a format is compressed or not.
+ */
+#define DRM_FORMAT_MOD_ARM_INTERLEAVED_64K \
+	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 2ULL)
+
 /*
  * Allwinner tiled modifier
  *

base-commit: f08f665f8cda9520d98ee24545d306a92f386616
-- 
2.47.3

On Wed, 28 Jan 2026 18:40:57 +0000
Caterina Shablia <caterina.shablia@collabora.com> wrote:

> This modifier is primarily intended to be used by panvk to implement
> sparse partially-resident images with better map and unmap
> performance, and no worse access performance, compared to
> implementing them in terms of U-interleaved.
> 
> With this modifier, the plane is divided into 64k byte 1:1 or 2:1
> -sided tiles. The 64k tiles are laid out linearly. Each 64k tile
> is divided into blocks of 16x16 texel blocks each, which themselves
> are laid out linearly within a 64k tile. Then within each such
> 16x16 block, texel blocks are laid out according to U order,
> similar to 16X16_BLOCK_U_INTERLEAVED.
> 
> Unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not depend on
> whether a format is compressed or not.
> 
> The hardware features corresponding to this modifier are available
> starting with v10 (second gen Valhall.)
> 
> The corresponding panvk MR can be found at:
> https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38986
> 
> Previous version:
> https://lists.freedesktop.org/archives/dri-devel/2026-January/547072.html
> 
> No changes since v2
> 
> Changes since v1:
> 
> * Rewrite the description of the modifier to be hopefully unambiguous.
> 
> Signed-off-by: Caterina Shablia <caterina.shablia@collabora.com>
> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>

Queued to drm-misc-next.

> ---
>  include/uapi/drm/drm_fourcc.h | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index e527b24bd824..452f901513ad 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -1422,6 +1422,22 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
>  #define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \
>  	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL)
>  
> +/*
> + * ARM 64k interleaved modifier
> + *
> + * This is used by ARM Mali v10+ GPUs. With this modifier, the plane is divided
> + * into 64k byte 1:1 or 2:1 -sided tiles. The 64k tiles are laid out linearly.
> + * Each 64k tile is divided into blocks of 16x16 texel blocks, which are
> + * themselves laid out linearly within a 64k tile. Then within each 16x16
> + * block, texel blocks are laid out according to U order, similar to
> + * 16X16_BLOCK_U_INTERLEAVED.
> + *
> + * Note that unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not change
> + * depending on whether a format is compressed or not.
> + */
> +#define DRM_FORMAT_MOD_ARM_INTERLEAVED_64K \
> +	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 2ULL)
> +
>  /*
>   * Allwinner tiled modifier
>   *
> 
> base-commit: f08f665f8cda9520d98ee24545d306a92f386616