[PATCH] dmaengine: dw-edma: fix MSI data programming for multi-IRQ case

Shenghui Shi posted 1 patch 1 week, 3 days ago
There is a newer version of this series
drivers/dma/dw-edma/dw-edma-core.c | 25 +++++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
[PATCH] dmaengine: dw-edma: fix MSI data programming for multi-IRQ case
Posted by Shenghui Shi 1 week, 3 days ago
When using MSI (not MSI-X) with multiple IRQs, the MSI data value
must be unique per vector to ensure correct interrupt delivery.
Currently, the driver fails to increment the MSI data per vector,
causing interrupts to be misrouted.

Fix this by caching the base MSI data and adjusting each vector's
data accordingly during IRQ setup.

This issue was reproduced and tested on:
- Device: [20e0:2502] (rev 01)
- Kernel: 6.8.0-90-generic

Signed-off-by: Shenghui Shi <brody.shi@m2semi.com>
---
 drivers/dma/dw-edma/dw-edma-core.c | 25 +++++++++++++++++++++++--
 1 file changed, 23 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
index 8e5f7defa..516770388 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -844,11 +844,15 @@ static int dw_edma_irq_request(struct dw_edma *dw,
 {
 	struct dw_edma_chip *chip = dw->chip;
 	struct device *dev = dw->chip->dev;
+	struct msi_desc *msi_desc;
 	u32 wr_mask = 1;
 	u32 rd_mask = 1;
 	int i, err = 0;
 	u32 ch_cnt;
 	int irq;
+	u16 msi_base_data = 0;
+	bool msi_base_valid = false;
+	bool is_msix = false;
 
 	ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt;
 
@@ -869,8 +873,15 @@ static int dw_edma_irq_request(struct dw_edma *dw,
 			return err;
 		}
 
-		if (irq_get_msi_desc(irq))
+		if (irq_get_msi_desc(irq)) {
 			get_cached_msi_msg(irq, &dw->irq[0].msi);
+			msi_desc = irq_get_msi_desc(irq);
+			is_msix = msi_desc && msi_desc->pci.msi_attrib.is_msix;
+			if (!is_msix) {
+				msi_base_data = dw->irq[0].msi.data;
+				msi_base_valid = true;
+			}
+		}
 
 		dw->nr_irqs = 1;
 	} else {
@@ -896,8 +907,18 @@ static int dw_edma_irq_request(struct dw_edma *dw,
 			if (err)
 				goto err_irq_free;
 
-			if (irq_get_msi_desc(irq))
+			if (irq_get_msi_desc(irq)) {
 				get_cached_msi_msg(irq, &dw->irq[i].msi);
+				msi_desc = irq_get_msi_desc(irq);
+				is_msix = msi_desc && msi_desc->pci.msi_attrib.is_msix;
+				if (!is_msix) {
+					if (!msi_base_valid) {
+						msi_base_data = dw->irq[i].msi.data;
+						msi_base_valid = true;
+					}
+					dw->irq[i].msi.data = (u16)(msi_base_data + i);
+				}
+			}
 		}
 
 		dw->nr_irqs = i;
-- 
2.49.0.windows.1
Re: [PATCH] dmaengine: dw-edma: fix MSI data programming for multi-IRQ case
Posted by Frank Li 1 week, 3 days ago
On Thu, Jan 29, 2026 at 01:45:52AM +0800, Shenghui Shi wrote:
> When using MSI (not MSI-X) with multiple IRQs, the MSI data value
> must be unique per vector to ensure correct interrupt delivery.
> Currently, the driver fails to increment the MSI data per vector,
> causing interrupts to be misrouted.
>
> Fix this by caching the base MSI data and adjusting each vector's
> data accordingly during IRQ setup.
>
> This issue was reproduced and tested on:
> - Device: [20e0:2502] (rev 01)
> - Kernel: 6.8.0-90-generic

Please use fixes tag

Frank
>
> Signed-off-by: Shenghui Shi <brody.shi@m2semi.com>
> ---
>  drivers/dma/dw-edma/dw-edma-core.c | 25 +++++++++++++++++++++++--
>  1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
> index 8e5f7defa..516770388 100644
> --- a/drivers/dma/dw-edma/dw-edma-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-core.c
> @@ -844,11 +844,15 @@ static int dw_edma_irq_request(struct dw_edma *dw,
>  {
>  	struct dw_edma_chip *chip = dw->chip;
>  	struct device *dev = dw->chip->dev;
> +	struct msi_desc *msi_desc;
>  	u32 wr_mask = 1;
>  	u32 rd_mask = 1;
>  	int i, err = 0;
>  	u32 ch_cnt;
>  	int irq;
> +	u16 msi_base_data = 0;
> +	bool msi_base_valid = false;
> +	bool is_msix = false;
>
>  	ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt;
>
> @@ -869,8 +873,15 @@ static int dw_edma_irq_request(struct dw_edma *dw,
>  			return err;
>  		}
>
> -		if (irq_get_msi_desc(irq))
> +		if (irq_get_msi_desc(irq)) {
>  			get_cached_msi_msg(irq, &dw->irq[0].msi);
> +			msi_desc = irq_get_msi_desc(irq);
> +			is_msix = msi_desc && msi_desc->pci.msi_attrib.is_msix;
> +			if (!is_msix) {
> +				msi_base_data = dw->irq[0].msi.data;
> +				msi_base_valid = true;
> +			}
> +		}
>
>  		dw->nr_irqs = 1;
>  	} else {
> @@ -896,8 +907,18 @@ static int dw_edma_irq_request(struct dw_edma *dw,
>  			if (err)
>  				goto err_irq_free;
>
> -			if (irq_get_msi_desc(irq))
> +			if (irq_get_msi_desc(irq)) {
>  				get_cached_msi_msg(irq, &dw->irq[i].msi);
> +				msi_desc = irq_get_msi_desc(irq);
> +				is_msix = msi_desc && msi_desc->pci.msi_attrib.is_msix;
> +				if (!is_msix) {
> +					if (!msi_base_valid) {
> +						msi_base_data = dw->irq[i].msi.data;
> +						msi_base_valid = true;
> +					}
> +					dw->irq[i].msi.data = (u16)(msi_base_data + i);
> +				}
> +			}
>  		}
>
>  		dw->nr_irqs = i;
> --
> 2.49.0.windows.1
>