X1P42100 video clock controller has most clocks same as SM8650,
but it also has few additional clocks and resets. Add device
tree bindings for the video clock controller on Qualcomm
X1P42100 platform by defining these additional clocks and resets
on top of SM8650.
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
---
.../bindings/clock/qcom,sm8450-videocc.yaml | 2 ++
include/dt-bindings/clock/qcom,x1p42100-videocc.h | 21 +++++++++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..e8bf3fcad3fabc4f3b7e8e692c6c634d1aed9605 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
@@ -30,6 +30,7 @@ properties:
- qcom,sm8650-videocc
- qcom,sm8750-videocc
- qcom,x1e80100-videocc
+ - qcom,x1p42100-videocc
clocks:
items:
@@ -67,6 +68,7 @@ allOf:
- qcom,sm8450-videocc
- qcom,sm8550-videocc
- qcom,sm8750-videocc
+ - qcom,x1p42100-videocc
then:
required:
- required-opps
diff --git a/include/dt-bindings/clock/qcom,x1p42100-videocc.h b/include/dt-bindings/clock/qcom,x1p42100-videocc.h
new file mode 100644
index 0000000000000000000000000000000000000000..eb6c9b7264f8cbced7cfa0001903238ffa168431
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,x1p42100-videocc.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H
+#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H
+
+#include "qcom,sm8650-videocc.h"
+
+/* X1P42100 introduces below new clocks and resets compared to SM8650 */
+
+/* VIDEO_CC clocks */
+#define VIDEO_CC_MVS0_BSE_CLK 17
+#define VIDEO_CC_MVS0_BSE_CLK_SRC 18
+#define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC 19
+
+/* VIDEO_CC resets */
+#define VIDEO_CC_MVS0_BSE_BCR 8
+
+#endif
--
2.34.1On Wed, Jan 28, 2026 at 12:56:32AM +0530, Jagadeesh Kona wrote: > diff --git a/include/dt-bindings/clock/qcom,x1p42100-videocc.h b/include/dt-bindings/clock/qcom,x1p42100-videocc.h > new file mode 100644 > index 0000000000000000000000000000000000000000..eb6c9b7264f8cbced7cfa0001903238ffa168431 > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,x1p42100-videocc.h > @@ -0,0 +1,21 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H > +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H > + > +#include "qcom,sm8650-videocc.h" Don't do this. It's already a mess and was allowed as an exception. Now you grow exception into pattern of chained bindings. > + > +/* X1P42100 introduces below new clocks and resets compared to SM8650 */ Best regards, Krzysztof
On 1/28/2026 5:13 PM, Krzysztof Kozlowski wrote: > On Wed, Jan 28, 2026 at 12:56:32AM +0530, Jagadeesh Kona wrote: >> diff --git a/include/dt-bindings/clock/qcom,x1p42100-videocc.h b/include/dt-bindings/clock/qcom,x1p42100-videocc.h >> new file mode 100644 >> index 0000000000000000000000000000000000000000..eb6c9b7264f8cbced7cfa0001903238ffa168431 >> --- /dev/null >> +++ b/include/dt-bindings/clock/qcom,x1p42100-videocc.h >> @@ -0,0 +1,21 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H >> +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H >> + >> +#include "qcom,sm8650-videocc.h" > > Don't do this. It's already a mess and was allowed as an exception. Now > you grow exception into pattern of chained bindings. > Yes, will drop this approach and extend the existing SM8650 bindings to include new clocks and BCR. Thanks, Jagadeesh > >> + >> +/* X1P42100 introduces below new clocks and resets compared to SM8650 */ > > Best regards, > Krzysztof >
On 1/27/26 8:26 PM, Jagadeesh Kona wrote: > X1P42100 video clock controller has most clocks same as SM8650, > but it also has few additional clocks and resets. Add device > tree bindings for the video clock controller on Qualcomm > X1P42100 platform by defining these additional clocks and resets > on top of SM8650. > > Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> > --- [...] > +#include "qcom,sm8650-videocc.h" > + > +/* X1P42100 introduces below new clocks and resets compared to SM8650 */ > + > +/* VIDEO_CC clocks */ > +#define VIDEO_CC_MVS0_BSE_CLK 17 > +#define VIDEO_CC_MVS0_BSE_CLK_SRC 18 > +#define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC 19 I checked a number of platforms and the _BSE clocks are only present on Purwa, without any explanation in the corresponding docs. What are they used for? Konrad
On 1/28/2026 3:38 PM, Konrad Dybcio wrote: > On 1/27/26 8:26 PM, Jagadeesh Kona wrote: >> X1P42100 video clock controller has most clocks same as SM8650, >> but it also has few additional clocks and resets. Add device >> tree bindings for the video clock controller on Qualcomm >> X1P42100 platform by defining these additional clocks and resets >> on top of SM8650. >> >> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> >> --- > > [...] > >> +#include "qcom,sm8650-videocc.h" >> + >> +/* X1P42100 introduces below new clocks and resets compared to SM8650 */ >> + >> +/* VIDEO_CC clocks */ >> +#define VIDEO_CC_MVS0_BSE_CLK 17 >> +#define VIDEO_CC_MVS0_BSE_CLK_SRC 18 >> +#define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC 19 > > I checked a number of platforms and the _BSE clocks are only present on > Purwa, without any explanation in the corresponding docs. > > What are they used for? > These clocks are used to drive Bin stream engine, which is a sub-block of video codec HW, which seems to be present only on Purwa. Thanks, Jagadeesh
On Wed, Jan 28, 2026 at 12:56:32AM +0530, Jagadeesh Kona wrote: > X1P42100 video clock controller has most clocks same as SM8650, > but it also has few additional clocks and resets. Add device > tree bindings for the video clock controller on Qualcomm > X1P42100 platform by defining these additional clocks and resets > on top of SM8650. > > Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> > --- > .../bindings/clock/qcom,sm8450-videocc.yaml | 2 ++ > include/dt-bindings/clock/qcom,x1p42100-videocc.h | 21 +++++++++++++++++++++ > 2 files changed, 23 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..e8bf3fcad3fabc4f3b7e8e692c6c634d1aed9605 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > @@ -30,6 +30,7 @@ properties: > - qcom,sm8650-videocc > - qcom,sm8750-videocc > - qcom,x1e80100-videocc > + - qcom,x1p42100-videocc > > clocks: > items: > @@ -67,6 +68,7 @@ allOf: > - qcom,sm8450-videocc > - qcom,sm8550-videocc > - qcom,sm8750-videocc > + - qcom,x1p42100-videocc > then: > required: > - required-opps > diff --git a/include/dt-bindings/clock/qcom,x1p42100-videocc.h b/include/dt-bindings/clock/qcom,x1p42100-videocc.h > new file mode 100644 > index 0000000000000000000000000000000000000000..eb6c9b7264f8cbced7cfa0001903238ffa168431 > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,x1p42100-videocc.h > @@ -0,0 +1,21 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H > +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H > + > +#include "qcom,sm8650-videocc.h" > + > +/* X1P42100 introduces below new clocks and resets compared to SM8650 */ And then someone introduces new clocks or resets into SM8650 bindings and this gets busted. Please extend the existing header. > + > +/* VIDEO_CC clocks */ > +#define VIDEO_CC_MVS0_BSE_CLK 17 > +#define VIDEO_CC_MVS0_BSE_CLK_SRC 18 > +#define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC 19 > + > +/* VIDEO_CC resets */ > +#define VIDEO_CC_MVS0_BSE_BCR 8 > + > +#endif > > -- > 2.34.1 > -- With best wishes Dmitry
On 1/28/2026 2:04 AM, Dmitry Baryshkov wrote: > On Wed, Jan 28, 2026 at 12:56:32AM +0530, Jagadeesh Kona wrote: >> X1P42100 video clock controller has most clocks same as SM8650, >> but it also has few additional clocks and resets. Add device >> tree bindings for the video clock controller on Qualcomm >> X1P42100 platform by defining these additional clocks and resets >> on top of SM8650. >> >> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> >> --- >> .../bindings/clock/qcom,sm8450-videocc.yaml | 2 ++ >> include/dt-bindings/clock/qcom,x1p42100-videocc.h | 21 +++++++++++++++++++++ >> 2 files changed, 23 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..e8bf3fcad3fabc4f3b7e8e692c6c634d1aed9605 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml >> @@ -30,6 +30,7 @@ properties: >> - qcom,sm8650-videocc >> - qcom,sm8750-videocc >> - qcom,x1e80100-videocc >> + - qcom,x1p42100-videocc >> >> clocks: >> items: >> @@ -67,6 +68,7 @@ allOf: >> - qcom,sm8450-videocc >> - qcom,sm8550-videocc >> - qcom,sm8750-videocc >> + - qcom,x1p42100-videocc >> then: >> required: >> - required-opps >> diff --git a/include/dt-bindings/clock/qcom,x1p42100-videocc.h b/include/dt-bindings/clock/qcom,x1p42100-videocc.h >> new file mode 100644 >> index 0000000000000000000000000000000000000000..eb6c9b7264f8cbced7cfa0001903238ffa168431 >> --- /dev/null >> +++ b/include/dt-bindings/clock/qcom,x1p42100-videocc.h >> @@ -0,0 +1,21 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H >> +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H >> + >> +#include "qcom,sm8650-videocc.h" >> + >> +/* X1P42100 introduces below new clocks and resets compared to SM8650 */ > > And then someone introduces new clocks or resets into SM8650 bindings > and this gets busted. Please extend the existing header. > Yes, I will drop this and extend the SM8650 bindings to include the new clocks and BCR. Thanks, Jagadeesh >> + >> +/* VIDEO_CC clocks */ >> +#define VIDEO_CC_MVS0_BSE_CLK 17 >> +#define VIDEO_CC_MVS0_BSE_CLK_SRC 18 >> +#define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC 19 >> + >> +/* VIDEO_CC resets */ >> +#define VIDEO_CC_MVS0_BSE_BCR 8 >> + >> +#endif >> >> -- >> 2.34.1 >> >
On 1/27/26 9:34 PM, Dmitry Baryshkov wrote:
> On Wed, Jan 28, 2026 at 12:56:32AM +0530, Jagadeesh Kona wrote:
>> X1P42100 video clock controller has most clocks same as SM8650,
>> but it also has few additional clocks and resets. Add device
>> tree bindings for the video clock controller on Qualcomm
>> X1P42100 platform by defining these additional clocks and resets
>> on top of SM8650.
>>
>> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
>> ---
>> .../bindings/clock/qcom,sm8450-videocc.yaml | 2 ++
>> include/dt-bindings/clock/qcom,x1p42100-videocc.h | 21 +++++++++++++++++++++
>> 2 files changed, 23 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
>> index e6beebd6a36ee1ce213a816f60df8a76fa5c44d6..e8bf3fcad3fabc4f3b7e8e692c6c634d1aed9605 100644
>> --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
>> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
>> @@ -30,6 +30,7 @@ properties:
>> - qcom,sm8650-videocc
>> - qcom,sm8750-videocc
>> - qcom,x1e80100-videocc
>> + - qcom,x1p42100-videocc
>>
>> clocks:
>> items:
>> @@ -67,6 +68,7 @@ allOf:
>> - qcom,sm8450-videocc
>> - qcom,sm8550-videocc
>> - qcom,sm8750-videocc
>> + - qcom,x1p42100-videocc
>> then:
>> required:
>> - required-opps
>> diff --git a/include/dt-bindings/clock/qcom,x1p42100-videocc.h b/include/dt-bindings/clock/qcom,x1p42100-videocc.h
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..eb6c9b7264f8cbced7cfa0001903238ffa168431
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/qcom,x1p42100-videocc.h
>> @@ -0,0 +1,21 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>> +/*
>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>> + */
>> +
>> +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H
>> +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H
>> +
>> +#include "qcom,sm8650-videocc.h"
>> +
>> +/* X1P42100 introduces below new clocks and resets compared to SM8650 */
>
> And then someone introduces new clocks or resets into SM8650 bindings
> and this gets busted. Please extend the existing header.
This is funny..
$ rg sm8450-videocc.h arch/ -l
arch/arm64/boot/dts/qcom/hamoa.dtsi
arch/arm64/boot/dts/qcom/sm8550.dtsi
arch/arm64/boot/dts/qcom/sm8450.dtsi
$ rg sm8450-videocc.h drivers/ -l
drivers/clk/qcom/videocc-sm8450.c
hmm! :)
Checking further, we have videocc-sm8550.c catering:
{ .compatible = "qcom,sm8550-videocc" },
{ .compatible = "qcom,sm8650-videocc" },
{ .compatible = "qcom,x1e80100-videocc" },
and including qcom,sm8*6*50-videocc.h
BUT it doesn't end there
qcom,sm8650-videocc.h starts with #include "qcom,sm8450-videocc.h"
So it's quite a matryoshka..
Konrad
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