.../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM
pin controller, fully compatible with previous SM8450 generation
(same amount of pins and functions).
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
---
changes in [v3]:
- Removed the duplicate driver code patch as suggested by Krzysztof.
- Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300.
- Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/
changes in [v2]:
- Fixed dt-binding errors reported by Krzysztof and Rob.
- Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad.
- Documented Monaco compatible as suggested by Konrad.
- Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/
---
.../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
index e7565592d..354629c38 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
@@ -15,7 +15,15 @@ description:
properties:
compatible:
- const: qcom,sm8450-lpass-lpi-pinctrl
+ oneOf:
+ - const: qcom,sm8450-lpass-lpi-pinctrl
+ - items:
+ - enum:
+ - qcom,qcs8300-lpass-lpi-pinctrl
+ - qcom,sa8775p-lpass-lpi-pinctrl
+ - const: qcom,sm8450-lpass-lpi-pinctrl
+ minItems: 1
+ maxItems: 2
reg:
items:
--
2.34.1
On Tue, Jan 27, 2026 at 04:25:11PM +0530, Mohammad Rafi Shaik wrote: > Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM > pin controller, fully compatible with previous SM8450 generation > (same amount of pins and functions). > > Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> > --- > changes in [v3]: > - Removed the duplicate driver code patch as suggested by Krzysztof. > - Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300. > - Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/ > > changes in [v2]: > - Fixed dt-binding errors reported by Krzysztof and Rob. > - Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad. > - Documented Monaco compatible as suggested by Konrad. > - Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/ > --- > .../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml > index e7565592d..354629c38 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml > @@ -15,7 +15,15 @@ description: > > properties: > compatible: > - const: qcom,sm8450-lpass-lpi-pinctrl > + oneOf: > + - const: qcom,sm8450-lpass-lpi-pinctrl > + - items: > + - enum: > + - qcom,qcs8300-lpass-lpi-pinctrl > + - qcom,sa8775p-lpass-lpi-pinctrl > + - const: qcom,sm8450-lpass-lpi-pinctrl > + minItems: 1 > + maxItems: 2 No. You are either backwards compatible with sm8450 or you aren't. The h/w is fixed. Rob
On 1/27/2026 7:47 PM, Rob Herring wrote:
> On Tue, Jan 27, 2026 at 04:25:11PM +0530, Mohammad Rafi Shaik wrote:
>> Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM
>> pin controller, fully compatible with previous SM8450 generation
>> (same amount of pins and functions).
>>
>> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
>> ---
>> changes in [v3]:
>> - Removed the duplicate driver code patch as suggested by Krzysztof.
>> - Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300.
>> - Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/
>>
>> changes in [v2]:
>> - Fixed dt-binding errors reported by Krzysztof and Rob.
>> - Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad.
>> - Documented Monaco compatible as suggested by Konrad.
>> - Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/
>> ---
>> .../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++-
>> 1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
>> index e7565592d..354629c38 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
>> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
>> @@ -15,7 +15,15 @@ description:
>>
>> properties:
>> compatible:
>> - const: qcom,sm8450-lpass-lpi-pinctrl
>> + oneOf:
>> + - const: qcom,sm8450-lpass-lpi-pinctrl
>> + - items:
>> + - enum:
>> + - qcom,qcs8300-lpass-lpi-pinctrl
>> + - qcom,sa8775p-lpass-lpi-pinctrl
>> + - const: qcom,sm8450-lpass-lpi-pinctrl
>> + minItems: 1
>> + maxItems: 2
>
> No. You are either backwards compatible with sm8450 or you aren't. The
> h/w is fixed.
>
ACK,
Agree,
Need backward compatibility with sm8450 for both sa8775p and qcs8300 as
they must fall back to the sm8450, so initially used enum to pick
between the sa8775p and qcs8300 compatibles. I see enum isn’t
appropriate here since fixed h/w.
will use the const instead of enum like below.
properties:
compatible:
- const: qcom,sm8450-lpass-lpi-pinctrl
+ oneOf:
+ - const: qcom,sm8450-lpass-lpi-pinctrl
+ - items:
+ - const: qcom,sa8775p-lpass-lpi-pinctrl
+ - const: qcom,sm8450-lpass-lpi-pinctrl
+
+ - items:
+ - const: qcom,qcs8300-lpass-lpi-pinctrl
+ - const: qcom,sm8450-lpass-lpi-pinctrl
Thanks & Regards,
Rafi
> Rob
On Tue, Jan 27, 2026 at 12:13 PM Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> wrote: > > > > On 1/27/2026 7:47 PM, Rob Herring wrote: > > On Tue, Jan 27, 2026 at 04:25:11PM +0530, Mohammad Rafi Shaik wrote: > >> Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM > >> pin controller, fully compatible with previous SM8450 generation > >> (same amount of pins and functions). > >> > >> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> > >> --- > >> changes in [v3]: > >> - Removed the duplicate driver code patch as suggested by Krzysztof. > >> - Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300. > >> - Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/ > >> > >> changes in [v2]: > >> - Fixed dt-binding errors reported by Krzysztof and Rob. > >> - Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad. > >> - Documented Monaco compatible as suggested by Konrad. > >> - Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/ > >> --- > >> .../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++- > >> 1 file changed, 9 insertions(+), 1 deletion(-) > >> > >> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml > >> index e7565592d..354629c38 100644 > >> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml > >> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml > >> @@ -15,7 +15,15 @@ description: > >> > >> properties: > >> compatible: > >> - const: qcom,sm8450-lpass-lpi-pinctrl > >> + oneOf: > >> + - const: qcom,sm8450-lpass-lpi-pinctrl > >> + - items: > >> + - enum: > >> + - qcom,qcs8300-lpass-lpi-pinctrl > >> + - qcom,sa8775p-lpass-lpi-pinctrl > >> + - const: qcom,sm8450-lpass-lpi-pinctrl > >> + minItems: 1 > >> + maxItems: 2 > > > > No. You are either backwards compatible with sm8450 or you aren't. The > > h/w is fixed. > > > > ACK, > > Agree, > > Need backward compatibility with sm8450 for both sa8775p and qcs8300 as > they must fall back to the sm8450, so initially used enum to pick > between the sa8775p and qcs8300 compatibles. I see enum isn’t > appropriate here since fixed h/w. > > will use the const instead of enum like below. > > properties: > compatible: > - const: qcom,sm8450-lpass-lpi-pinctrl > + oneOf: > + - const: qcom,sm8450-lpass-lpi-pinctrl > + - items: > + - const: qcom,sa8775p-lpass-lpi-pinctrl > + - const: qcom,sm8450-lpass-lpi-pinctrl > + > + - items: > + - const: qcom,qcs8300-lpass-lpi-pinctrl > + - const: qcom,sm8450-lpass-lpi-pinctrl Sigh, no. The 2 entries can be combined like you had. Just drop minItems and maxItems from what you had. And test your binding before sending it. Rob
On 1/27/2026 11:57 PM, Rob Herring wrote: > On Tue, Jan 27, 2026 at 12:13 PM Mohammad Rafi Shaik > <mohammad.rafi.shaik@oss.qualcomm.com> wrote: >> >> >> >> On 1/27/2026 7:47 PM, Rob Herring wrote: >>> On Tue, Jan 27, 2026 at 04:25:11PM +0530, Mohammad Rafi Shaik wrote: >>>> Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM >>>> pin controller, fully compatible with previous SM8450 generation >>>> (same amount of pins and functions). >>>> >>>> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> >>>> --- >>>> changes in [v3]: >>>> - Removed the duplicate driver code patch as suggested by Krzysztof. >>>> - Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300. >>>> - Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/ >>>> >>>> changes in [v2]: >>>> - Fixed dt-binding errors reported by Krzysztof and Rob. >>>> - Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad. >>>> - Documented Monaco compatible as suggested by Konrad. >>>> - Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/ >>>> --- >>>> .../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++- >>>> 1 file changed, 9 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml >>>> index e7565592d..354629c38 100644 >>>> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml >>>> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml >>>> @@ -15,7 +15,15 @@ description: >>>> >>>> properties: >>>> compatible: >>>> - const: qcom,sm8450-lpass-lpi-pinctrl >>>> + oneOf: >>>> + - const: qcom,sm8450-lpass-lpi-pinctrl >>>> + - items: >>>> + - enum: >>>> + - qcom,qcs8300-lpass-lpi-pinctrl >>>> + - qcom,sa8775p-lpass-lpi-pinctrl >>>> + - const: qcom,sm8450-lpass-lpi-pinctrl >>>> + minItems: 1 >>>> + maxItems: 2 >>> >>> No. You are either backwards compatible with sm8450 or you aren't. The >>> h/w is fixed. >>> >> >> ACK, >> >> Agree, >> >> Need backward compatibility with sm8450 for both sa8775p and qcs8300 as >> they must fall back to the sm8450, so initially used enum to pick >> between the sa8775p and qcs8300 compatibles. I see enum isn’t >> appropriate here since fixed h/w. >> >> will use the const instead of enum like below. >> >> properties: >> compatible: >> - const: qcom,sm8450-lpass-lpi-pinctrl >> + oneOf: >> + - const: qcom,sm8450-lpass-lpi-pinctrl >> + - items: >> + - const: qcom,sa8775p-lpass-lpi-pinctrl >> + - const: qcom,sm8450-lpass-lpi-pinctrl >> + >> + - items: >> + - const: qcom,qcs8300-lpass-lpi-pinctrl >> + - const: qcom,sm8450-lpass-lpi-pinctrl > > Sigh, no. The 2 entries can be combined like you had. Just drop > minItems and maxItems from what you had. > > And test your binding before sending it. > Sure, I’ll take care of it going forward Thanks & Regarding, Rafi. > Rob
On Tue, 27 Jan 2026 16:25:11 +0530, Mohammad Rafi Shaik wrote:
> Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM
> pin controller, fully compatible with previous SM8450 generation
> (same amount of pins and functions).
>
> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
> ---
> changes in [v3]:
> - Removed the duplicate driver code patch as suggested by Krzysztof.
> - Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300.
> - Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/
>
> changes in [v2]:
> - Fixed dt-binding errors reported by Krzysztof and Rob.
> - Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad.
> - Documented Monaco compatible as suggested by Konrad.
> - Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/
> ---
> .../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml: properties:compatible:oneOf:1: {'items': [{'enum': ['qcom,qcs8300-lpass-lpi-pinctrl', 'qcom,sa8775p-lpass-lpi-pinctrl']}, {'const': 'qcom,sm8450-lpass-lpi-pinctrl'}], 'minItems': 1, 'maxItems': 2} should not be valid under {'required': ['maxItems']}
hint: "maxItems" is not needed with an "items" list
from schema $id: http://devicetree.org/meta-schemas/items.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml: properties:compatible:oneOf:1: {'items': [{'enum': ['qcom,qcs8300-lpass-lpi-pinctrl', 'qcom,sa8775p-lpass-lpi-pinctrl']}, {'const': 'qcom,sm8450-lpass-lpi-pinctrl'}], 'minItems': 1, 'maxItems': 2} should not be valid under {'required': ['maxItems']}
hint: "maxItems" is not needed with an "items" list
from schema $id: http://devicetree.org/meta-schemas/items.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260127105511.3917491-1-mohammad.rafi.shaik@oss.qualcomm.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
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