On 1/27/26 12:38 AM, Elson Serrao wrote:
> On this board, EUD resides on the primary High-Speed USB data path between
> the connector and the DWC3 controller. Update the device tree connections
> to correctly map the connector and controller endpoints, and describe
> role-switch capability on the EUD primary path.
>
> Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 20 ++++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> index f29a352b0288..2fc2d0aed8dd 100644
> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> @@ -194,7 +194,7 @@ port@0 {
> reg = <0>;
>
> pmic_glink_hs_in: endpoint {
> - remote-endpoint = <&usb_1_dwc3_hs>;
> + remote-endpoint = <&eud_con0>;
> };
> };
>
> @@ -1176,13 +1176,29 @@ &usb_1 {
> };
>
> &usb_1_dwc3_hs {
> - remote-endpoint = <&pmic_glink_hs_in>;
> + remote-endpoint = <&eud_usb0>;
> };
>
> &usb_1_dwc3_ss {
> remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
The on-SoC links can be deferred to the common DTSI
> };
>
> +&eud_con0 {
> + remote-endpoint = <&pmic_glink_hs_in>;
> +};
> +
> +&eud_usb0 {
> + remote-endpoint = <&usb_1_dwc3_hs>;
> +};
> +
> +&eud {
> + status = "okay";
And I think it should be okay to keep it enabled by default
Konrad