1. Patchew
  2. linux
  3. View series

[PATCH 0/2] PCI: dwc: Expose integrated DesignWare eDMA windows

Koichiro Den posted 2 patches 1 week, 5 days ago 
MAINTAINERS                                  |  2 +-
drivers/pci/controller/dwc/pcie-designware.c | 74 ++++++++++++++++++++
drivers/pci/controller/dwc/pcie-designware.h |  2 +
include/linux/pcie-dwc-edma.h                | 72 +++++++++++++++++++
4 files changed, 149 insertions(+), 1 deletion(-)
create mode 100644 include/linux/pcie-dwc-edma.h
[PATCH 0/2] PCI: dwc: Expose integrated DesignWare eDMA windows
Posted by Koichiro Den 1 week, 5 days ago 
This series adds small, query-only helper APIs to the DesignWare PCIe
endpoint controller driver to expose resources of an integrated
DesignWare eDMA instance. Specifically, it allows querying:

  - the physical base address and size of the integrated eDMA register
    aperture, and
  - the per-channel linked-list (LL) region base and size, keyed by
    transfer direction and hardware channel identifier.

The motivation is that some DesignWare PCIe endpoint platforms integrate
an eDMA engine that can be driven either locally by the endpoint or
remotely by the host. Remote eDMA use cases (e.g. [1]) need to expose
the eDMA register block and LL regions to the host through PCIe BARs,
while still allowing the endpoint to boot with a standard EP settings,
without DT changes to hide the eDMA instance from the endpoint itself.

The hardware channel identifier used by the LL-region helper can be
obtained via dma_get_slave_caps().hw_id, introduced by a dmaengine
series posted separately.

[1] [RFC PATCH v4 00/38] NTB transport backed by PCI EP embedded DMA
    https://lore.kernel.org/linux-pci/20260118135440.1958279-1-den@valinux.co.jp/

Developed on PCI controller/dwc:
  commit 0ecd890e3cf5 ("PCI: dwc: Rename dw_pcie_rp::has_msi_ctrl to
                        dw_pcie_rp::use_imsi_rx for clarity")

Kind regards,

Koichiro Den (2):
  PCI: dwc: Add helper to query integrated dw-edma register window
  PCI: dwc: Add helper to query integrated dw-edma linked-list region

 MAINTAINERS                                  |  2 +-
 drivers/pci/controller/dwc/pcie-designware.c | 74 ++++++++++++++++++++
 drivers/pci/controller/dwc/pcie-designware.h |  2 +
 include/linux/pcie-dwc-edma.h                | 72 +++++++++++++++++++
 4 files changed, 149 insertions(+), 1 deletion(-)
 create mode 100644 include/linux/pcie-dwc-edma.h

-- 
2.51.0
Re: [PATCH 0/2] PCI: dwc: Expose integrated DesignWare eDMA windows
Posted by Koichiro Den 1 week, 5 days ago 
On Mon, Jan 26, 2026 at 04:15:48PM +0900, Koichiro Den wrote:
> This series adds small, query-only helper APIs to the DesignWare PCIe
> endpoint controller driver to expose resources of an integrated
> DesignWare eDMA instance. Specifically, it allows querying:
> 
>   - the physical base address and size of the integrated eDMA register
>     aperture, and
>   - the per-channel linked-list (LL) region base and size, keyed by
>     transfer direction and hardware channel identifier.
> 
> The motivation is that some DesignWare PCIe endpoint platforms integrate
> an eDMA engine that can be driven either locally by the endpoint or
> remotely by the host. Remote eDMA use cases (e.g. [1]) need to expose
> the eDMA register block and LL regions to the host through PCIe BARs,
> while still allowing the endpoint to boot with a standard EP settings,
> without DT changes to hide the eDMA instance from the endpoint itself.
> 
> The hardware channel identifier used by the LL-region helper can be
> obtained via dma_get_slave_caps().hw_id, introduced by a dmaengine
> series posted separately.

For reference, the series has been submitted here:

  [PATCH 0/5] dmaengine: dw-edma: Add helpers for remote eDMA use scenarios
  https://lore.kernel.org/dmaengine/20260126073652.3293564-1-den@valinux.co.jp/

Kind regards,
Koichiro

> 
> [1] [RFC PATCH v4 00/38] NTB transport backed by PCI EP embedded DMA
>     https://lore.kernel.org/linux-pci/20260118135440.1958279-1-den@valinux.co.jp/
> 
> Developed on PCI controller/dwc:
>   commit 0ecd890e3cf5 ("PCI: dwc: Rename dw_pcie_rp::has_msi_ctrl to
>                         dw_pcie_rp::use_imsi_rx for clarity")
> 
> Kind regards,
> 
> Koichiro Den (2):
>   PCI: dwc: Add helper to query integrated dw-edma register window
>   PCI: dwc: Add helper to query integrated dw-edma linked-list region
> 
>  MAINTAINERS                                  |  2 +-
>  drivers/pci/controller/dwc/pcie-designware.c | 74 ++++++++++++++++++++
>  drivers/pci/controller/dwc/pcie-designware.h |  2 +
>  include/linux/pcie-dwc-edma.h                | 72 +++++++++++++++++++
>  4 files changed, 149 insertions(+), 1 deletion(-)
>  create mode 100644 include/linux/pcie-dwc-edma.h
> 
> -- 
> 2.51.0
>
Re: [PATCH 0/2] PCI: dwc: Expose integrated DesignWare eDMA windows
Posted by Frank Li 1 week, 5 days ago 
On Mon, Jan 26, 2026 at 04:55:58PM +0900, Koichiro Den wrote:
> On Mon, Jan 26, 2026 at 04:15:48PM +0900, Koichiro Den wrote:
> > This series adds small, query-only helper APIs to the DesignWare PCIe
> > endpoint controller driver to expose resources of an integrated
> > DesignWare eDMA instance. Specifically, it allows querying:
> >
> >   - the physical base address and size of the integrated eDMA register
> >     aperture, and
> >   - the per-channel linked-list (LL) region base and size, keyed by
> >     transfer direction and hardware channel identifier.
> >
> > The motivation is that some DesignWare PCIe endpoint platforms integrate
> > an eDMA engine that can be driven either locally by the endpoint or
> > remotely by the host. Remote eDMA use cases (e.g. [1]) need to expose
> > the eDMA register block and LL regions to the host through PCIe BARs,
> > while still allowing the endpoint to boot with a standard EP settings,
> > without DT changes to hide the eDMA instance from the endpoint itself.
> >
> > The hardware channel identifier used by the LL-region helper can be
> > obtained via dma_get_slave_caps().hw_id, introduced by a dmaengine
> > series posted separately.
>
> For reference, the series has been submitted here:
>
>   [PATCH 0/5] dmaengine: dw-edma: Add helpers for remote eDMA use scenarios
>   https://lore.kernel.org/dmaengine/20260126073652.3293564-1-den@valinux.co.jp/

It'd better post together. It needs API user.

Frank
>
> Kind regards,
> Koichiro
>
> >
> > [1] [RFC PATCH v4 00/38] NTB transport backed by PCI EP embedded DMA
> >     https://lore.kernel.org/linux-pci/20260118135440.1958279-1-den@valinux.co.jp/
> >
> > Developed on PCI controller/dwc:
> >   commit 0ecd890e3cf5 ("PCI: dwc: Rename dw_pcie_rp::has_msi_ctrl to
> >                         dw_pcie_rp::use_imsi_rx for clarity")
> >
> > Kind regards,
> >
> > Koichiro Den (2):
> >   PCI: dwc: Add helper to query integrated dw-edma register window
> >   PCI: dwc: Add helper to query integrated dw-edma linked-list region
> >
> >  MAINTAINERS                                  |  2 +-
> >  drivers/pci/controller/dwc/pcie-designware.c | 74 ++++++++++++++++++++
> >  drivers/pci/controller/dwc/pcie-designware.h |  2 +
> >  include/linux/pcie-dwc-edma.h                | 72 +++++++++++++++++++
> >  4 files changed, 149 insertions(+), 1 deletion(-)
> >  create mode 100644 include/linux/pcie-dwc-edma.h
> >
> > --
> > 2.51.0
> >
Re: [PATCH 0/2] PCI: dwc: Expose integrated DesignWare eDMA windows
Posted by Koichiro Den 1 week, 5 days ago 
On Mon, Jan 26, 2026 at 12:47:51PM -0500, Frank Li wrote:
> On Mon, Jan 26, 2026 at 04:55:58PM +0900, Koichiro Den wrote:
> > On Mon, Jan 26, 2026 at 04:15:48PM +0900, Koichiro Den wrote:
> > > This series adds small, query-only helper APIs to the DesignWare PCIe
> > > endpoint controller driver to expose resources of an integrated
> > > DesignWare eDMA instance. Specifically, it allows querying:
> > >
> > >   - the physical base address and size of the integrated eDMA register
> > >     aperture, and
> > >   - the per-channel linked-list (LL) region base and size, keyed by
> > >     transfer direction and hardware channel identifier.
> > >
> > > The motivation is that some DesignWare PCIe endpoint platforms integrate
> > > an eDMA engine that can be driven either locally by the endpoint or
> > > remotely by the host. Remote eDMA use cases (e.g. [1]) need to expose
> > > the eDMA register block and LL regions to the host through PCIe BARs,
> > > while still allowing the endpoint to boot with a standard EP settings,
> > > without DT changes to hide the eDMA instance from the endpoint itself.
> > >
> > > The hardware channel identifier used by the LL-region helper can be
> > > obtained via dma_get_slave_caps().hw_id, introduced by a dmaengine
> > > series posted separately.
> >
> > For reference, the series has been submitted here:
> >
> >   [PATCH 0/5] dmaengine: dw-edma: Add helpers for remote eDMA use scenarios
> >   https://lore.kernel.org/dmaengine/20260126073652.3293564-1-den@valinux.co.jp/
> 
> It'd better post together. It needs API user.

Thanks for the comment. I've sent v2, please see:
https://lore.kernel.org/all/20260127033420.3460579-1-den@valinux.co.jp/

Koichiro

> 
> Frank
> >
> > Kind regards,
> > Koichiro
> >
> > >
> > > [1] [RFC PATCH v4 00/38] NTB transport backed by PCI EP embedded DMA
> > >     https://lore.kernel.org/linux-pci/20260118135440.1958279-1-den@valinux.co.jp/
> > >
> > > Developed on PCI controller/dwc:
> > >   commit 0ecd890e3cf5 ("PCI: dwc: Rename dw_pcie_rp::has_msi_ctrl to
> > >                         dw_pcie_rp::use_imsi_rx for clarity")
> > >
> > > Kind regards,
> > >
> > > Koichiro Den (2):
> > >   PCI: dwc: Add helper to query integrated dw-edma register window
> > >   PCI: dwc: Add helper to query integrated dw-edma linked-list region
> > >
> > >  MAINTAINERS                                  |  2 +-
> > >  drivers/pci/controller/dwc/pcie-designware.c | 74 ++++++++++++++++++++
> > >  drivers/pci/controller/dwc/pcie-designware.h |  2 +
> > >  include/linux/pcie-dwc-edma.h                | 72 +++++++++++++++++++
> > >  4 files changed, 149 insertions(+), 1 deletion(-)
> > >  create mode 100644 include/linux/pcie-dwc-edma.h
> > >
> > > --
> > > 2.51.0
> > >

Patchew 2.1-devel-b67e4c2

© 2016 - 2026 Red Hat, Inc.