The MediaTek UFS driver contains support for an undocumented,
non-vendor-prefixed u32 property named "clk-scale-up-vcore-min".
Since it is not part of any binding, and would not pass a bindings
review in its current form, remove it.
To return this functionality, it needs to be resubmitted in a series
that also introduces it to the binding, and justifies what it is used
for. Compatibility with downstream device trees is not a valid
justification for its existence.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 19 -------------------
1 file changed, 19 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index e863e4f8af55..dfa104207cc6 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -880,8 +880,6 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct list_head *head = &hba->clk_list_head;
struct ufs_clk_info *clki, *clki_tmp;
- struct device *dev = hba->dev;
- u32 volt;
/*
* Find private clocks and store them in struct ufs_mtk_clk.
@@ -918,24 +916,7 @@ static void ufs_mtk_init_clocks(struct ufs_hba *hba)
if (!ufs_mtk_is_clk_scale_ready(hba)) {
hba->caps &= ~UFSHCD_CAP_CLK_SCALING;
dev_info(hba->dev, "%s: Clock scaling unavailable", __func__);
- return;
- }
-
- if (!host->reg_vcore)
- return;
-
- if (of_property_read_u32(dev->of_node, "clk-scale-up-vcore-min",
- &volt)) {
- dev_info(dev, "failed to get clk-scale-up-vcore-min");
- return;
}
-
- host->mclk.vcore_volt = volt;
-
- /* If default boot is max gear, request vcore */
- if (volt && host->clk_scale_up)
- if (regulator_set_voltage(host->reg_vcore, volt, INT_MAX))
- dev_err(hba->dev, "Failed to set vcore to %d\n", volt);
}
static void ufs_mtk_setup_clk_gating(struct ufs_hba *hba)
--
2.52.0