On Fri, 23 Jan 2026 at 10:53, Albert Yang <yangzh0906@thundersoft.com> wrote:
>
> This series adds MMC/eMMC controller support for Black Sesame Technologies
> C1200 SoC. BST is a leading automotive-grade computing SoC provider focusing
> on intelligent driving, computer vision, and AI capabilities for ADAS and
> autonomous driving applications. More information: https://bst.ai
>
> == Background ==
>
> This is the MMC portion split from the original v4 series [1] following
> feedback from Arnd Bergmann [2]. The platform support (vendor-prefix,
> SoC bindings, Kconfig ARCH_BST, base DTS, defconfig ARCH_BST) has already
> been merged into Linux 6.19 through the SoC tree [3].
>
> == Series Overview ==
>
> Patch 1: dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller
> Patch 2: mmc: sdhci: allow drivers to pre-allocate bounce buffer
> Patch 3: mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver
> Patch 4: arm64: dts: bst: enable eMMC controller in C1200 CDCU1.0 board
> Patch 5: arm64: defconfig: enable BST SDHCI controller
> Patch 6: MAINTAINERS: add MMC files to BST entry
>
> == Testing ==
>
> - checkpatch.pl: PASS (all patches)
> - dt_binding_check: PASS
> - dtbs_check (CHECK_DTBS=y): PASS
> - Build tested with ARCH=arm64 defconfig
>
> == Changes since v4 ==
>
> - Split: Platform patches merged separately via SoC tree; this series is
> MMC-only, submitted to MMC maintainers
>
> DT binding (patch 1):
> - Rename file from bst,dwcmshc-sdhci.yaml to bst,c1200-sdhci.yaml
> - Fix example compatible string to match property definition
>
> Driver (patch 3):
> - Fix compatible string to match dt-bindings (bst,c1200-sdhci)
> - Simplify clock divider calculation with clearer frequency range logic
> - Add linux/bits.h and linux/bitfield.h headers
> - Remove unused linux/ioport.h header
> - Rename SDHCI_TUNING_COUNT to BST_TUNING_COUNT
> - Rename BST_EMMC_CTRL_BIT2 to BST_EMMC_CTRL_RST_N
> - Fix BST_DEFAULT_MAX_FREQ from 2MHz to 200MHz
> - Convert kernel-doc to regular comments (per Adrian Hunter)
> - Add sdhci_bst_free_bounce_buffer() helper (per Adrian Hunter)
>
>
> == References ==
>
> [1] v4: https://lore.kernel.org/lkml/20250923-v4-patch-final-v1-0-2283ad7cbf88@thundersoft.com/
> [2] Split: https://lore.kernel.org/lkml/09b1318e-21dc-4354-8733-866b70696295@app.fastmail.com/
> [3] Merged via soc-newsoc-6.19
>
> Albert Yang (6):
> dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller
> mmc: sdhci: allow drivers to pre-allocate bounce buffer
> mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver
> arm64: dts: bst: enable eMMC controller in C1200 CDCU1.0 board
> arm64: defconfig: enable BST SDHCI controller
> MAINTAINERS: add MMC files to BST entry
>
> .../bindings/mmc/bst,c1200-sdhci.yaml | 70 +++
> MAINTAINERS | 2 +
> .../dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts | 19 +
> arch/arm64/boot/dts/bst/bstc1200.dtsi | 18 +
> arch/arm64/configs/defconfig | 1 +
> drivers/mmc/host/Kconfig | 14 +
> drivers/mmc/host/Makefile | 1 +
> drivers/mmc/host/sdhci-of-bst.c | 521 ++++++++++++++++++
> drivers/mmc/host/sdhci.c | 7 +
> 9 files changed, 653 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml
> create mode 100644 drivers/mmc/host/sdhci-of-bst.c
>
> base-commit: 0f61b1860cc3f52aef9036d7235ed1f017632193
> --
> 2.43.0
>
Patch 1 to 3 and patch 6 applied for next, thanks!
The DTS patches (patch 4 and patch 5) should be picked up by the SoC maintainer.
Kind regards
Uffe