[PATCH v5 2/5] arm64: dts: imx8mm: Add pinctrl config definitions

Maud Spierings via B4 Relay posted 5 patches 2 weeks, 3 days ago
There is a newer version of this series
[PATCH v5 2/5] arm64: dts: imx8mm: Add pinctrl config definitions
Posted by Maud Spierings via B4 Relay 2 weeks, 3 days ago
From: Maud Spierings <maudspierings@gocontroll.com>

Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 33 ++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index b1f11098d248..31557b7b9ccc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
@@ -6,6 +6,39 @@
 #ifndef __DTS_IMX8MM_PINFUNC_H
 #define __DTS_IMX8MM_PINFUNC_H
 
+/* Drive Strength */
+#define MX8MM_DSE_X1		0x0
+#define MX8MM_DSE_X2		0x4
+#define MX8MM_DSE_X4		0x2
+#define MX8MM_DSE_X6		0x6
+
+/* Slew Rate */
+#define MX8MM_FSEL_FAST		0x10
+#define MX8MM_FSEL_SLOW		0x0
+
+/* Open Drain */
+#define MX8MM_ODE_ENABLE	0x20
+#define MX8MM_ODE_DISABLE	0x0
+
+#define MX8MM_PULL_DOWN		0x0
+#define MX8MM_PULL_UP		0x40
+
+/* Hysteresis */
+#define MX8MM_HYS_CMOS		0x0
+#define MX8MM_HYS_SCHMITT	0x80
+
+#define MX8MM_PULL_ENABLE	0x100
+#define MX8MM_PULL_DISABLE	0x0
+
+/* SION force input mode */
+#define MX8MM_SION		0x40000000
+
+/* long defaults */
+#define MX8MM_USDHC_DATA_DEFAULT (MX8MM_FSEL_FAST | MX8MM_PULL_UP | \
+				  MX8MM_HYS_SCHMITT | MX8MM_PULL_ENABLE)
+#define MX8MM_I2C_DEFAULT (MX8MM_DSE_X6 | MX8MM_PULL_UP | MX8MM_HYS_SCHMITT | \
+			   MX8MM_PULL_ENABLE | MX8MM_SION)
+
 /*
  * The pin function ID is a tuple of
  * <mux_reg conf_reg input_reg mux_mode input_val>

-- 
2.52.0
Re: [PATCH v5 2/5] arm64: dts: imx8mm: Add pinctrl config definitions
Posted by Frank Li 2 weeks, 2 days ago
On Fri, Jan 23, 2026 at 09:30:29AM +0100, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
> register is written in the dts, these values are not obvious. Add defines
> which describe the fields of this register which can be or-ed together to
> produce readable settings.
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>
>  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 33 ++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> index b1f11098d248..31557b7b9ccc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> @@ -6,6 +6,39 @@
>  #ifndef __DTS_IMX8MM_PINFUNC_H
>  #define __DTS_IMX8MM_PINFUNC_H
>
> +/* Drive Strength */
> +#define MX8MM_DSE_X1		0x0
> +#define MX8MM_DSE_X2		0x4
> +#define MX8MM_DSE_X4		0x2
> +#define MX8MM_DSE_X6		0x6
> +
> +/* Slew Rate */
> +#define MX8MM_FSEL_FAST		0x10
> +#define MX8MM_FSEL_SLOW		0x0
> +
> +/* Open Drain */
> +#define MX8MM_ODE_ENABLE	0x20
> +#define MX8MM_ODE_DISABLE	0x0
> +
> +#define MX8MM_PULL_DOWN		0x0
> +#define MX8MM_PULL_UP		0x40
> +
> +/* Hysteresis */
> +#define MX8MM_HYS_CMOS		0x0
> +#define MX8MM_HYS_SCHMITT	0x80
> +
> +#define MX8MM_PULL_ENABLE	0x100
> +#define MX8MM_PULL_DISABLE	0x0
> +
> +/* SION force input mode */
> +#define MX8MM_SION		0x40000000
> +
> +/* long defaults */
> +#define MX8MM_USDHC_DATA_DEFAULT (MX8MM_FSEL_FAST | MX8MM_PULL_UP | \
> +				  MX8MM_HYS_SCHMITT | MX8MM_PULL_ENABLE)
> +#define MX8MM_I2C_DEFAULT (MX8MM_DSE_X6 | MX8MM_PULL_UP | MX8MM_HYS_SCHMITT | \
> +			   MX8MM_PULL_ENABLE | MX8MM_SION)
> +
>  /*
>   * The pin function ID is a tuple of
>   * <mux_reg conf_reg input_reg mux_mode input_val>
>
> --
> 2.52.0
>
>