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[PATCH] arm64: dts: qcom: talos: add ETR device

Jie Gan posted 1 patch 2 weeks, 2 days ago
There is a newer version of this series
arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
[PATCH] arm64: dts: qcom: talos: add ETR device
Posted by Jie Gan 2 weeks, 2 days ago 
Add the TMC ETR device to store collected trace data in DDR memory.

Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index 75716b4a58d6..3b081ce9d202 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -2253,6 +2253,14 @@ out-ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
 
+				port@0 {
+					reg = <0>;
+
+					replicator0_out0: endpoint {
+						remote-endpoint = <&tmc_etr_in>;
+					};
+				};
+
 				port@1 {
 					reg = <1>;
 
@@ -2287,6 +2295,25 @@ tmc_etf_out: endpoint {
 			};
 		};
 
+		tmc_etr: tmc@6048000 {
+			compatible = "arm,coresight-tmc", "arm,primecell";
+			reg = <0x0 0x06048000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			iommus = <&apps_smmu 0x01e0 0x0>;
+			arm,scatter-gather;
+
+			in-ports {
+				port {
+					tmc_etr_in: endpoint {
+						remote-endpoint = <&replicator0_out0>;
+					};
+				};
+			};
+		};
+
 		replicator@604a000 {
 			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
 			reg = <0x0 0x0604a000 0x0 0x1000>;

---
base-commit: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d
change-id: 20260123-enable-etr-and-ctcu-devices-0b1386899261

Best regards,
-- 
Jie Gan <jie.gan@oss.qualcomm.com>
Re: [PATCH] arm64: dts: qcom: talos: add ETR device
Posted by Konrad Dybcio 1 week, 5 days ago 
On 1/23/26 8:10 AM, Jie Gan wrote:
> Add the TMC ETR device to store collected trace data in DDR memory.
> 
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
> index 75716b4a58d6..3b081ce9d202 100644
> --- a/arch/arm64/boot/dts/qcom/talos.dtsi
> +++ b/arch/arm64/boot/dts/qcom/talos.dtsi
> @@ -2253,6 +2253,14 @@ out-ports {
>  				#address-cells = <1>;
>  				#size-cells = <0>;
>  
> +				port@0 {
> +					reg = <0>;
> +
> +					replicator0_out0: endpoint {
> +						remote-endpoint = <&tmc_etr_in>;
> +					};
> +				};
> +
>  				port@1 {
>  					reg = <1>;
>  
> @@ -2287,6 +2295,25 @@ tmc_etf_out: endpoint {
>  			};
>  		};
>  
> +		tmc_etr: tmc@6048000 {

This label is unused, please remove it

Otherwise lgtm

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad
Re: [PATCH] arm64: dts: qcom: talos: add ETR device
Posted by Rob Herring 2 weeks, 2 days ago 
On Fri, 23 Jan 2026 15:10:46 +0800, Jie Gan wrote:
> Add the TMC ETR device to store collected trace data in DDR memory.
> 
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


This patch series was applied (using b4) to base:
 Base: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d (use --merge-base to override)

If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)


New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20260123-enable-etr-and-ctcu-devices-v1-1-5fbb3423a2d7@oss.qualcomm.com:

arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000 (qcom,qcs615-gcc): 'clock-names' is a required property
	from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml
Re: [PATCH] arm64: dts: qcom: talos: add ETR device
Posted by Jie Gan 1 week, 6 days ago 

On 1/23/2026 10:29 PM, Rob Herring wrote:
> 
> On Fri, 23 Jan 2026 15:10:46 +0800, Jie Gan wrote:
>> Add the TMC ETR device to store collected trace data in DDR memory.
>>
>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
>>   1 file changed, 27 insertions(+)
>>
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
> 
>    pip3 install dtschema --upgrade
> 
> 
> This patch series was applied (using b4) to base:
>   Base: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d (use --merge-base to override)
> 
> If this is not the correct base, please add 'base-commit' tag
> (or use b4 which does this automatically)
> 
> 
> New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20260123-enable-etr-and-ctcu-devices-v1-1-5fbb3423a2d7@oss.qualcomm.com:
> 
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000 (qcom,qcs615-gcc): 'clock-names' is a required property
> 	from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml

Hi Rob,

This warning is not introduced by my patch. I think it's a false positive.

Thanks,
Jie


> 
> 
> 
> 
>
Re: [PATCH] arm64: dts: qcom: talos: add ETR device
Posted by Konrad Dybcio 1 week, 6 days ago 
On 1/26/26 2:25 AM, Jie Gan wrote:
> 
> 
> On 1/23/2026 10:29 PM, Rob Herring wrote:
>>
>> On Fri, 23 Jan 2026 15:10:46 +0800, Jie Gan wrote:
>>> Add the TMC ETR device to store collected trace data in DDR memory.
>>>
>>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
>>>   1 file changed, 27 insertions(+)
>>>
>>
>>
>> My bot found new DTB warnings on the .dts files added or changed in this
>> series.
>>
>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>> are fixed by another series. Ultimately, it is up to the platform
>> maintainer whether these warnings are acceptable or not. No need to reply
>> unless the platform maintainer has comments.
>>
>> If you already ran DT checks and didn't see these error(s), then
>> make sure dt-schema is up to date:
>>
>>    pip3 install dtschema --upgrade
>>
>>
>> This patch series was applied (using b4) to base:
>>   Base: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d (use --merge-base to override)
>>
>> If this is not the correct base, please add 'base-commit' tag
>> (or use b4 which does this automatically)
>>
>>
>> New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20260123-enable-etr-and-ctcu-devices-v1-1-5fbb3423a2d7@oss.qualcomm.com:
>>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000 (qcom,qcs615-gcc): 'clock-names' is a required property
>>     from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml
> 
> Hi Rob,
> 
> This warning is not introduced by my patch. I think it's a false positive.

The bot checks for any warnings on the file, as ideally there would
be none. This one is indeed pre-existing.

Konrad
Re: [PATCH] arm64: dts: qcom: talos: add ETR device
Posted by Jie Gan 1 week, 5 days ago 

On 1/26/2026 5:37 PM, Konrad Dybcio wrote:
> On 1/26/26 2:25 AM, Jie Gan wrote:
>>
>>
>> On 1/23/2026 10:29 PM, Rob Herring wrote:
>>>
>>> On Fri, 23 Jan 2026 15:10:46 +0800, Jie Gan wrote:
>>>> Add the TMC ETR device to store collected trace data in DDR memory.
>>>>
>>>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
>>>>    1 file changed, 27 insertions(+)
>>>>
>>>
>>>
>>> My bot found new DTB warnings on the .dts files added or changed in this
>>> series.
>>>
>>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>>> are fixed by another series. Ultimately, it is up to the platform
>>> maintainer whether these warnings are acceptable or not. No need to reply
>>> unless the platform maintainer has comments.
>>>
>>> If you already ran DT checks and didn't see these error(s), then
>>> make sure dt-schema is up to date:
>>>
>>>     pip3 install dtschema --upgrade
>>>
>>>
>>> This patch series was applied (using b4) to base:
>>>    Base: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d (use --merge-base to override)
>>>
>>> If this is not the correct base, please add 'base-commit' tag
>>> (or use b4 which does this automatically)
>>>
>>>
>>> New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20260123-enable-etr-and-ctcu-devices-v1-1-5fbb3423a2d7@oss.qualcomm.com:
>>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000 (qcom,qcs615-gcc): 'clock-names' is a required property
>>>      from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml
>>
>> Hi Rob,
>>
>> This warning is not introduced by my patch. I think it's a false positive.
> 
> The bot checks for any warnings on the file, as ideally there would
> be none. This one is indeed pre-existing.

Hi Konrad,

Thanks for confirming, I found you already sent a patch to fix the warning.

Could you please help to review the patch also?

Thanks,
Jie


> 
> Konrad

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