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[PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

Chaoyi Chen posted 3 patches 2 weeks, 3 days ago
[PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
Posted by Chaoyi Chen 2 weeks, 3 days ago 
From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

According to the description in the net documentation, PHY modes
"rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
to be delayed on the PCB.

The Rockchip platform has long used the above mentioned PHY modes and
private delay prop to describe the internal IO delay settings of the
chip, which is inconsistent with what is described in the documentation.

Let's describe this part of the delay in the PHY and use the more
reasonable "rgmii-id" mode.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
index c5584c26db52..3ee76bafafb5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
@@ -266,7 +266,7 @@ &combphy1_psu {
 
 &gmac0 {
 	clock_in_out = "output";
-	phy-mode = "rgmii-rxid";
+	phy-mode = "rgmii-id";
 	phy-handle = <&rgmii_phy0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&eth0m0_miim
@@ -275,14 +275,13 @@ &eth0m0_rx_bus2
 		     &eth0m0_rgmii_clk
 		     &eth0m0_rgmii_bus
 		     &ethm0_clk0_25m_out>;
-	tx_delay = <0x21>;
 	status = "okay";
 };
 
 &gmac1 {
 	clock_in_out = "output";
 	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii-rxid";
+	phy-mode = "rgmii-id";
 	pinctrl-names = "default";
 	pinctrl-0 = <&eth1m0_miim
 		     &eth1m0_tx_bus2
@@ -290,7 +289,6 @@ &eth1m0_rx_bus2
 		     &eth1m0_rgmii_clk
 		     &eth1m0_rgmii_bus
 		     &ethm0_clk1_25m_out>;
-	tx_delay = <0x20>;
 	status = "okay";
 };
 
@@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
 		reset-assert-us = <20000>;
 		reset-deassert-us = <100000>;
 		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+		tx-internal-delay-ps = <1950>;
 	};
 };
 
@@ -737,6 +736,7 @@ rgmii_phy1: ethernet-phy@1 {
 		reset-assert-us = <20000>;
 		reset-deassert-us = <100000>;
 		reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
+		tx-internal-delay-ps = <1950>;
 	};
 };
 
-- 
2.51.1
Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
Posted by Andrew Lunn 2 weeks, 3 days ago 
> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>  		reset-assert-us = <20000>;
>  		reset-deassert-us = <100000>;
>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
> +		tx-internal-delay-ps = <1950>;

The PHY should add 2000ps, as required by the RGMII standard. The
difference is so small there is no need for tx-internal-delay.

In most cases, 'rmgii-id' should be sufficient, unless the PCB is
badly designed.

      Andrew
Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
Posted by Chaoyi Chen 2 weeks, 2 days ago 
Hi Andrew,

On 1/21/2026 8:55 PM, Andrew Lunn wrote:
>> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>>  		reset-assert-us = <20000>;
>>  		reset-deassert-us = <100000>;
>>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
>> +		tx-internal-delay-ps = <1950>;
> 
> The PHY should add 2000ps, as required by the RGMII standard. The
> difference is so small there is no need for tx-internal-delay.
>

Thank you for the clarification. I chose 1950 here because I find that
the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
1950 or 2100. 

> In most cases, 'rmgii-id' should be sufficient, unless the PCB is
> badly designed.
> 

I suspect the ROCK 4D board might be an exception. Sebastian once
reported that it wouldn't work properly under "rgmii-id". Well, I'm
not sure what strategy to adopt in this case.

-- 
Best, 
Chaoyi
Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
Posted by Andrew Lunn 2 weeks, 2 days ago 
On Thu, Jan 22, 2026 at 09:38:17AM +0800, Chaoyi Chen wrote:
> Hi Andrew,
> 
> On 1/21/2026 8:55 PM, Andrew Lunn wrote:
> >> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
> >>  		reset-assert-us = <20000>;
> >>  		reset-deassert-us = <100000>;
> >>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
> >> +		tx-internal-delay-ps = <1950>;
> > 
> > The PHY should add 2000ps, as required by the RGMII standard. The
> > difference is so small there is no need for tx-internal-delay.
> >
> 
> Thank you for the clarification. I chose 1950 here because I find that
> the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
> 1950 or 2100. 
> 
> > In most cases, 'rmgii-id' should be sufficient, unless the PCB is
> > badly designed.
> > 
> 
> I suspect the ROCK 4D board might be an exception. Sebastian once
> reported that it wouldn't work properly under "rgmii-id". Well, I'm
> not sure what strategy to adopt in this case.

Please check the report. And also, check what the PHY is doing for
delays if you don't specify the property. Is it defaulting to near
2000ps?

	Andrew
Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
Posted by Chaoyi Chen 2 weeks, 2 days ago 
Hi Andrew,

On 1/22/2026 10:40 AM, Andrew Lunn wrote:
> On Thu, Jan 22, 2026 at 09:38:17AM +0800, Chaoyi Chen wrote:
>> Hi Andrew,
>>
>> On 1/21/2026 8:55 PM, Andrew Lunn wrote:
>>>> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>>>>  		reset-assert-us = <20000>;
>>>>  		reset-deassert-us = <100000>;
>>>>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
>>>> +		tx-internal-delay-ps = <1950>;
>>>
>>> The PHY should add 2000ps, as required by the RGMII standard. The
>>> difference is so small there is no need for tx-internal-delay.
>>>
>>
>> Thank you for the clarification. I chose 1950 here because I find that
>> the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
>> 1950 or 2100. 
>>
>>> In most cases, 'rmgii-id' should be sufficient, unless the PCB is
>>> badly designed.
>>>
>>
>> I suspect the ROCK 4D board might be an exception. Sebastian once
>> reported that it wouldn't work properly under "rgmii-id". Well, I'm
>> not sure what strategy to adopt in this case.
> 
> Please check the report. And also, check what the PHY is doing for
> delays if you don't specify the property. Is it defaulting to near
> 2000ps?
> 

It is RTL8211F PHY. The origin report is here:

https://lore.kernel.org/all/20250724-rk3576-rock4d-phy-timings-v1-1-1cdce2b4aca4@kernel.org/

The RTL8211F binding doesn't provide any indication of the default
delay value. I'll checking datasheet to see if it's mentioned there.

-- 
Best, 
Chaoyi
Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
Posted by Chaoyi Chen 1 week ago 
On 1/22/2026 11:16 AM, Chaoyi Chen wrote:
> Hi Andrew,
> 
> On 1/22/2026 10:40 AM, Andrew Lunn wrote:
>> On Thu, Jan 22, 2026 at 09:38:17AM +0800, Chaoyi Chen wrote:
>>> Hi Andrew,
>>>
>>> On 1/21/2026 8:55 PM, Andrew Lunn wrote:
>>>>> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>>>>>  		reset-assert-us = <20000>;
>>>>>  		reset-deassert-us = <100000>;
>>>>>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
>>>>> +		tx-internal-delay-ps = <1950>;
>>>>
>>>> The PHY should add 2000ps, as required by the RGMII standard. The
>>>> difference is so small there is no need for tx-internal-delay.
>>>>
>>>
>>> Thank you for the clarification. I chose 1950 here because I find that
>>> the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
>>> 1950 or 2100. 
>>>
>>>> In most cases, 'rmgii-id' should be sufficient, unless the PCB is
>>>> badly designed.
>>>>
>>>
>>> I suspect the ROCK 4D board might be an exception. Sebastian once
>>> reported that it wouldn't work properly under "rgmii-id". Well, I'm
>>> not sure what strategy to adopt in this case.
>>
>> Please check the report. And also, check what the PHY is doing for
>> delays if you don't specify the property. Is it defaulting to near
>> 2000ps?
>>
> 
> It is RTL8211F PHY. The origin report is here:
> 
> https://lore.kernel.org/all/20250724-rk3576-rock4d-phy-timings-v1-1-1cdce2b4aca4@kernel.org/
> 
> The RTL8211F binding doesn't provide any indication of the default
> delay value. I'll checking datasheet to see if it's mentioned there.
> 

If "rgmii-id" is set, the RTL8211F driver adds the 2ns delay:

[0] https://elixir.bootlin.com/linux/v6.19-rc5/source/drivers/net/phy/realtek/realtek_main.c#L602

Sebastian, could you try testing how much extra delay the GMAC still
needs to add for the ROCK4D to work correctly, assuming the PHY
already has a 2 ns delay when "rgmii-id" is set?

-- 
Best, 
Chaoyi
Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
Posted by Diederik de Haas 2 weeks, 3 days ago 
On Wed Jan 21, 2026 at 4:15 AM CET, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>
> According to the description in the net documentation, PHY modes
> "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
> to be delayed on the PCB.
>
> The Rockchip platform has long used the above mentioned PHY modes and
> private delay prop to describe the internal IO delay settings of the
> chip, which is inconsistent with what is described in the documentation.
>
> Let's describe this part of the delay in the PHY and use the more
> reasonable "rgmii-id" mode.
>
> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
> index c5584c26db52..3ee76bafafb5 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
> @@ -266,7 +266,7 @@ &combphy1_psu {
>  
>  &gmac0 {
>  	clock_in_out = "output";
> -	phy-mode = "rgmii-rxid";
> +	phy-mode = "rgmii-id";
>  	phy-handle = <&rgmii_phy0>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&eth0m0_miim
> @@ -275,14 +275,13 @@ &eth0m0_rx_bus2
>  		     &eth0m0_rgmii_clk
>  		     &eth0m0_rgmii_bus
>  		     &ethm0_clk0_25m_out>;
> -	tx_delay = <0x21>;

This being '0x21' (not '0x20') ...

>  	status = "okay";
>  };
>  
>  &gmac1 {
>  	clock_in_out = "output";
>  	phy-handle = <&rgmii_phy1>;
> -	phy-mode = "rgmii-rxid";
> +	phy-mode = "rgmii-id";
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&eth1m0_miim
>  		     &eth1m0_tx_bus2
> @@ -290,7 +289,6 @@ &eth1m0_rx_bus2
>  		     &eth1m0_rgmii_clk
>  		     &eth1m0_rgmii_bus
>  		     &ethm0_clk1_25m_out>;
> -	tx_delay = <0x20>;
>  	status = "okay";
>  };
>  
> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>  		reset-assert-us = <20000>;
>  		reset-deassert-us = <100000>;
>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
> +		tx-internal-delay-ps = <1950>;

... shouldn't this be higher?
0.0579 * 0x21 + 0.105 = 2.0157 (not sure how the rounding goes)

Cheers,
  Diederik

>  	};
>  };
>  
> @@ -737,6 +736,7 @@ rgmii_phy1: ethernet-phy@1 {
>  		reset-assert-us = <20000>;
>  		reset-deassert-us = <100000>;
>  		reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
> +		tx-internal-delay-ps = <1950>;
>  	};
>  };
>

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