Hi,
This series extends the versaclock3 driver to support the internal
freerunning 32.768 kHz clock, which is used on the Renesas RZ/V2H
and RZ/V2N SoCs as RTC counter clock. It also adds the dts nodes for
the RZ/V2H and RZ/V2N EVKs.
Best regards,
Ovidiu
v2:
- Added versaclock3 dts node for RZ/V2N EVK.
v1: https://lore.kernel.org/all/20251021175311.19611-1-ovidiu.panait.rb@renesas.com/
Ovidiu Panait (5):
clk: versaclock3: Remove unused SE2 clock select macro
clk: versaclock3: Use clk_parent_data arrays for clk_mux
clk: versaclock3: Add freerunning 32.768kHz clock support
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add versa3 clock
generator node
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add versa3 clock
generator node
.../dts/renesas/r9a09g056n48-rzv2n-evk.dts | 25 ++++
.../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 25 ++++
drivers/clk/clk-versaclock3.c | 126 +++++++++++++-----
3 files changed, 145 insertions(+), 31 deletions(-)
--
2.51.0