Add GMAC nodes for our MA35D1 development boards:
two RGMII interfaces for SOM board, and one RGMII
and one RMII interface for IoT board.
Signed-off-by: Joey Lu <a0987203069@gmail.com>
---
.../boot/dts/nuvoton/ma35d1-iot-512m.dts | 12 +++++
.../boot/dts/nuvoton/ma35d1-som-256m.dts | 10 ++++
arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 54 +++++++++++++++++++
3 files changed, 76 insertions(+)
mode change 100644 => 100755 arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
mode change 100644 => 100755 arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
mode change 100644 => 100755 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
old mode 100644
new mode 100755
index 9482bec1aa57..5cc712ae92d8
--- a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
@@ -18,6 +18,8 @@ aliases {
serial12 = &uart12;
serial13 = &uart13;
serial14 = &uart14;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
};
chosen {
@@ -126,3 +128,13 @@ &uart14 {
pinctrl-0 = <&pinctrl_uart14>;
status = "okay";
};
+
+&gmac0 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&gmac1 {
+ phy-mode = "rmii";
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
old mode 100644
new mode 100755
index f6f20a17e501..1d9ac350a1f1
--- a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
@@ -18,6 +18,8 @@ aliases {
serial12 = &uart12;
serial14 = &uart14;
serial16 = &uart16;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
};
chosen {
@@ -129,3 +131,11 @@ &uart16 {
pinctrl-0 = <&pinctrl_uart16>;
status = "okay";
};
+
+&gmac0 {
+ status = "okay";
+};
+
+&gmac1 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
old mode 100644
new mode 100755
index e51b98f5bdce..89712e262ee6
--- a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
@@ -379,5 +379,59 @@ uart16: serial@40880000 {
clocks = <&clk UART16_GATE>;
status = "disabled";
};
+
+ gmac0: ethernet@40120000 {
+ compatible = "nuvoton,ma35d1-dwmac";
+ reg = <0x0 0x40120000 0x0 0x10000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
+ clock-names = "stmmaceth", "ptp_ref";
+
+ nuvoton,sys = <&sys 0>;
+ resets = <&sys MA35D1_RESET_GMAC0>;
+ reset-names = "stmmaceth";
+
+ phy-mode = "rgmii-id";
+ phy-handle = <ð_phy0>;
+ status = "disabled";
+
+ mdio0: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
+
+ gmac1: ethernet@40130000 {
+ compatible = "nuvoton,ma35d1-dwmac";
+ reg = <0x0 0x40130000 0x0 0x10000>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&clk EMAC1_GATE>, <&clk EPLL_DIV8>;
+ clock-names = "stmmaceth", "ptp_ref";
+
+ nuvoton,sys = <&sys 1>;
+ resets = <&sys MA35D1_RESET_GMAC1>;
+ reset-names = "stmmaceth";
+
+ phy-mode = "rgmii-id";
+ phy-handle = <ð_phy1>;
+ status = "disabled";
+
+ mdio1: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
};
};
--
2.43.0
On Mon, Jan 19, 2026 at 03:33:40PM +0800, Joey Lu wrote:
> Add GMAC nodes for our MA35D1 development boards:
> two RGMII interfaces for SOM board, and one RGMII
> and one RMII interface for IoT board.
>
> Signed-off-by: Joey Lu <a0987203069@gmail.com>
> ---
> .../boot/dts/nuvoton/ma35d1-iot-512m.dts | 12 +++++
> .../boot/dts/nuvoton/ma35d1-som-256m.dts | 10 ++++
> arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 54 +++++++++++++++++++
I'm somewhat confused with your naming here.
A SoM generally needs a carrier board. So the SoM is described as a
.dtsi file, which the carrier board .dts file can then include.
Where are the PHYs? Sometimes the PHYs are on the SoM, sometimes they
are on the carrier board. If they are not actually on the SoM, the
PHYs should not be listed as part of the SoM.
Andrew
Dear Andrew, Thanks for the clarification. In our design, the Ethernet PHYs are located on the base boards, not on the MA35D1 SOM. The SOM base board routes two RGMII interfaces from the SOM to two external PHYs on the carrier board. On the MA35D1 IoT board, there is no separate SOM and carrier board - it is a single integrated board. I will update the DTS accordingly so that no PHY nodes appear in .dtsi. Thanks! Best regards, Joey Andrew Lunn 於 1/19/2026 11:22 PM 寫道: > On Mon, Jan 19, 2026 at 03:33:40PM +0800, Joey Lu wrote: >> Add GMAC nodes for our MA35D1 development boards: >> two RGMII interfaces for SOM board, and one RGMII >> and one RMII interface for IoT board. >> >> Signed-off-by: Joey Lu <a0987203069@gmail.com> >> --- >> .../boot/dts/nuvoton/ma35d1-iot-512m.dts | 12 +++++ >> .../boot/dts/nuvoton/ma35d1-som-256m.dts | 10 ++++ >> arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 54 +++++++++++++++++++ > I'm somewhat confused with your naming here. > > A SoM generally needs a carrier board. So the SoM is described as a > .dtsi file, which the carrier board .dts file can then include. > > Where are the PHYs? Sometimes the PHYs are on the SoM, sometimes they > are on the carrier board. If they are not actually on the SoM, the > PHYs should not be listed as part of the SoM. > > Andrew
On Tue, Jan 20, 2026 at 09:34:39AM +0800, Joey Lu wrote: > Dear Andrew, Please don't top post. > > Thanks for the clarification. > > In our design, the Ethernet PHYs are located on the base boards, not on the > MA35D1 SOM. > > The SOM base board routes two RGMII interfaces from the SOM to two external > PHYs on the carrier board. > > On the MA35D1 IoT board, there is no separate SOM and carrier board - it is > a single integrated board. > > I will update the DTS accordingly so that no PHY nodes appear in .dtsi. > > Thanks! > > Best regards, > > Joey > > Andrew Lunn 於 1/19/2026 11:22 PM 寫道: > > On Mon, Jan 19, 2026 at 03:33:40PM +0800, Joey Lu wrote: > > > Add GMAC nodes for our MA35D1 development boards: > > > two RGMII interfaces for SOM board, and one RGMII > > > and one RMII interface for IoT board. > > > > > > Signed-off-by: Joey Lu <a0987203069@gmail.com> > > > --- > > > .../boot/dts/nuvoton/ma35d1-iot-512m.dts | 12 +++++ > > > .../boot/dts/nuvoton/ma35d1-som-256m.dts | 10 ++++ > > > arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 54 +++++++++++++++++++ Does ma35d1.dtsi represent the SOM? If so, what is ma35d1-som-256m.dts ? It looks like some odd sort of carrier board with a few serial ports and some memory? But systems like this put the memory on the SOM, not the carrier. As i said, i'm confused with your naming here. Andrew
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