On 26-01-17, Frank Li wrote:
> From: Fugang Duan <fugang.duan@nxp.com>
>
> Add uart3 port.
Would be nice to know why the port is needed? If it's just a UART on the
pin header I would rather keep it un-muxed to keep it easy to adapt the
EVK to dev needs.
Regards,
Marco
> Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> index 30b13b4d630f8b8b0531fad531081d4ee32849f9..8be44eaf4e1e0adc2921db8cc5f2dc69586b68cf 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> @@ -627,6 +627,15 @@ &uart2 { /* console */
> status = "okay";
> };
>
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + assigned-clocks = <&clk IMX8MM_CLK_UART3>;
> + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
> + uart-has-rtscts;
> + status = "okay";
> +};
> +
> &usbphynop1 {
> wakeup-source;
> };
> @@ -819,6 +828,15 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
> >;
> };
>
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
> + MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
> + MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
> + MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
> + >;
> + };
> +
> pinctrl_usdhc2_gpio: usdhc2grpgpiogrp {
> fsl,pins = <
> MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4
>
> --
> 2.34.1
>
>
>
--
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