Patches 1-5:
  o Resolve several issues in the current IBS implementation

Patches 6-11:
  o Add support for new capabilities that will appear in future AMD
    CPUs:
    - Alternate disable bit in with control only MSRs to eliminate the
      RMW race in existing IBS_{FETCH|OP}_CTL MSRs
    - RIP bit 63 filtering, which can be used as hardware assisted
      privilege filtering, enabling IBS for unprivileged users without
      software based privilege filtering
    - Fetch latency threshold filter to capture only high-latency fetch
      events
    - Streaming-store filter to sample only instructions that perform
      streaming stores
    - Remote socket indicator for load/store instructions

Patches are prepared on tip/perf/core (eebe6446ccb7)

TODO:
  o perf tool and man page changes
  o perf test "AMD IBS software filtering" is failing on system that
    supports RIP bit63 filtering, but it's false-positive. I'll post
    a fix along with perf tools changes

Ravi Bangoria (11):
  perf/amd/ibs: Throttle interrupts with filtered ldlat samples
  perf/amd/ibs: Limit ldlat->l3missonly dependency to Zen5
  perf/amd/ibs: Preserve PhyAddrVal bit when clearing PhyAddr MSR
  perf/amd/ibs: Avoid race between event add and NMI
  perf/amd/ibs: Define macro for ldlat mask
  perf/amd/ibs: Add new MSRs and CPUID bits definitions
  perf/amd/ibs: Support IBS_{FETCH|OP}_CTL2[Dis] to eliminate RMW race
  perf/amd/ibs: Enable fetch latency filtering
  perf/amd/ibs: Enable RIP bit63 hardware filtering
  perf/amd/ibs: Enable streaming store filter
  perf/amd/ibs: Advertise remote socket capability

 arch/x86/events/amd/ibs.c         | 252 ++++++++++++++++++++++++++++--
 arch/x86/include/asm/amd/ibs.h    |   4 +-
 arch/x86/include/asm/msr-index.h  |   2 +
 arch/x86/include/asm/perf_event.h |  52 +++---
 4 files changed, 275 insertions(+), 35 deletions(-)

-- 
2.43.0