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[PATCH] arm64: dts: renesas: rzt2h/rzn2h-evk: Reorder ADC nodes

Prabhakar posted 1 patch 3 weeks, 3 days ago 
.../dts/renesas/r9a09g077m44-rzt2h-evk.dts    |  55 +++---
.../dts/renesas/r9a09g087m44-rzn2h-evk.dts    | 127 +++++++-------
.../dts/renesas/rzt2h-n2h-evk-common.dtsi     | 157 +++++++++---------
3 files changed, 171 insertions(+), 168 deletions(-)
[PATCH] arm64: dts: renesas: rzt2h/rzn2h-evk: Reorder ADC nodes
Posted by Prabhakar 3 weeks, 3 days ago 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reorder the ADC nodes in the dts/i files so they follow the same
alphabetical ordering used elsewhere in these files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../dts/renesas/r9a09g077m44-rzt2h-evk.dts    |  55 +++---
 .../dts/renesas/r9a09g087m44-rzn2h-evk.dts    | 127 +++++++-------
 .../dts/renesas/rzt2h-n2h-evk-common.dtsi     | 157 +++++++++---------
 3 files changed, 171 insertions(+), 168 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
index eedea1ce57e6..e9639bbb2d70 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
@@ -171,6 +171,34 @@ led-8 {
 	};
 };
 
+&adc2 {
+	status = "okay";
+
+	channel@0 {
+		reg = <0x0>;
+	};
+
+	channel@1 {
+		reg = <0x1>;
+	};
+
+	channel@2 {
+		reg = <0x2>;
+	};
+
+	channel@3 {
+		reg = <0x3>;
+	};
+
+	channel@4 {
+		reg = <0x4>;
+	};
+
+	channel@5 {
+		reg = <0x5>;
+	};
+};
+
 &canfd {
 	pinctrl-0 = <&can0_pins>;
 	pinctrl-names = "default";
@@ -310,30 +338,3 @@ usb_pins: usb-pins {
 	};
 };
 
-&adc2 {
-	status = "okay";
-
-	channel@0 {
-		reg = <0x0>;
-	};
-
-	channel@1 {
-		reg = <0x1>;
-	};
-
-	channel@2 {
-		reg = <0x2>;
-	};
-
-	channel@3 {
-		reg = <0x3>;
-	};
-
-	channel@4 {
-		reg = <0x4>;
-	};
-
-	channel@5 {
-		reg = <0x5>;
-	};
-};
diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
index 5d1da4de8af6..19f0a2c06753 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
@@ -210,6 +210,70 @@ led-11 {
 	};
 };
 
+&adc2 {
+	status = "okay";
+
+	channel@0 {
+		reg = <0x0>;
+	};
+
+	channel@1 {
+		reg = <0x1>;
+	};
+
+	channel@2 {
+		reg = <0x2>;
+	};
+
+	channel@3 {
+		reg = <0x3>;
+	};
+
+	channel@4 {
+		reg = <0x4>;
+	};
+
+	channel@5 {
+		reg = <0x5>;
+	};
+
+	channel@6 {
+		reg = <0x6>;
+	};
+
+	channel@7 {
+		reg = <0x7>;
+	};
+
+	channel@8 {
+		reg = <0x8>;
+	};
+
+	channel@9 {
+		reg = <0x9>;
+	};
+
+	channel@a {
+		reg = <0xa>;
+	};
+
+	channel@b {
+		reg = <0xb>;
+	};
+
+	channel@c {
+		reg = <0xc>;
+	};
+
+	channel@d {
+		reg = <0xd>;
+	};
+
+	channel@e {
+		reg = <0xe>;
+	};
+};
+
 #if CANFD_ENABLE
 &canfd {
 	pinctrl-0 = <&can1_pins>;
@@ -368,66 +432,3 @@ usb_pins: usb-pins {
 	};
 };
 
-&adc2 {
-	status = "okay";
-
-	channel@0 {
-		reg = <0x0>;
-	};
-
-	channel@1 {
-		reg = <0x1>;
-	};
-
-	channel@2 {
-		reg = <0x2>;
-	};
-
-	channel@3 {
-		reg = <0x3>;
-	};
-
-	channel@4 {
-		reg = <0x4>;
-	};
-
-	channel@5 {
-		reg = <0x5>;
-	};
-
-	channel@6 {
-		reg = <0x6>;
-	};
-
-	channel@7 {
-		reg = <0x7>;
-	};
-
-	channel@8 {
-		reg = <0x8>;
-	};
-
-	channel@9 {
-		reg = <0x9>;
-	};
-
-	channel@a {
-		reg = <0xa>;
-	};
-
-	channel@b {
-		reg = <0xb>;
-	};
-
-	channel@c {
-		reg = <0xc>;
-	};
-
-	channel@d {
-		reg = <0xd>;
-	};
-
-	channel@e {
-		reg = <0xe>;
-	};
-};
diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
index 63bd91690b54..510399febf29 100644
--- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
@@ -69,6 +69,85 @@ vccq_sdhi1: regulator-vccq-sdhi1 {
 #endif
 };
 
+/*
+ * ADC0 AN000 can be connected to a potentiometer on the board or
+ * exposed on ADC header.
+ *
+ * T2H:
+ * SW17[1] = ON, SW17[2] = OFF - Potentiometer
+ * SW17[1] = OFF, SW17[2] = ON  - CN41 header
+ * N2H:
+ * DSW6[1] = OFF, DSW6[2] = ON - Potentiometer
+ * DSW6[1] = ON, DSW6[2] = OFF - CN3 header
+ */
+&adc0 {
+	status = "okay";
+
+	channel@0 {
+		reg = <0x0>;
+	};
+
+	channel@1 {
+		reg = <0x1>;
+	};
+
+	channel@2 {
+		reg = <0x2>;
+	};
+
+	channel@3 {
+		reg = <0x3>;
+	};
+};
+
+/*
+ * ADC1 AN100 can be exposed on ADC header or on mikroBUS connector.
+ *
+ * T2H:
+ * SW18[1] = ON, SW18[2] = OFF - CN42 header
+ * SW18[1] = OFF, SW18[2] = ON - mikroBUS
+ * N2H:
+ * DSW6[3] = ON, DSW6[4] = OFF - CN4 header
+ * DSW6[3] = OFF, DSW6[4] = ON - mikroBUS
+ *
+ * ADC1 AN101 can be exposed on ADC header or on Grove2 connector.
+ *
+ * T2H:
+ * SW18[3] = ON, SW18[4] = OFF - CN42 header
+ * SW18[3] = OFF, SW18[4] = ON - Grove2
+ * N2H:
+ * DSW6[5] = ON, DSW6[6] = OFF - CN4 header
+ * DSW6[5] = OFF, DSW6[6] = ON - Grove2
+ *
+ * ADC1 AN102 can be exposed on ADC header or on Grove2 connector.
+ *
+ * T2H:
+ * SW18[5] = ON, SW18[6] = OFF - CN42 header
+ * SW18[5] = OFF, SW18[6] = ON - Grove2
+ * N2H:
+ * DSW6[7] = ON, DSW6[8] = OFF - CN4 header
+ * DSW6[7] = OFF, DSW6[8] = ON - Grove2
+ */
+&adc1 {
+	status = "okay";
+
+	channel@0 {
+		reg = <0x0>;
+	};
+
+	channel@1 {
+		reg = <0x1>;
+	};
+
+	channel@2 {
+		reg = <0x2>;
+	};
+
+	channel@3 {
+		reg = <0x3>;
+	};
+};
+
 &ehci {
 	dr_mode = "otg";
 	status = "okay";
@@ -315,81 +394,3 @@ &wdt2 {
 	timeout-sec = <60>;
 };
 
-/*
- * ADC0 AN000 can be connected to a potentiometer on the board or
- * exposed on ADC header.
- *
- * T2H:
- * SW17[1] = ON, SW17[2] = OFF - Potentiometer
- * SW17[1] = OFF, SW17[2] = ON  - CN41 header
- * N2H:
- * DSW6[1] = OFF, DSW6[2] = ON - Potentiometer
- * DSW6[1] = ON, DSW6[2] = OFF - CN3 header
- */
-&adc0 {
-	status = "okay";
-
-	channel@0 {
-		reg = <0x0>;
-	};
-
-	channel@1 {
-		reg = <0x1>;
-	};
-
-	channel@2 {
-		reg = <0x2>;
-	};
-
-	channel@3 {
-		reg = <0x3>;
-	};
-};
-
-/*
- * ADC1 AN100 can be exposed on ADC header or on mikroBUS connector.
- *
- * T2H:
- * SW18[1] = ON, SW18[2] = OFF - CN42 header
- * SW18[1] = OFF, SW18[2] = ON - mikroBUS
- * N2H:
- * DSW6[3] = ON, DSW6[4] = OFF - CN4 header
- * DSW6[3] = OFF, DSW6[4] = ON - mikroBUS
- *
- * ADC1 AN101 can be exposed on ADC header or on Grove2 connector.
- *
- * T2H:
- * SW18[3] = ON, SW18[4] = OFF - CN42 header
- * SW18[3] = OFF, SW18[4] = ON - Grove2
- * N2H:
- * DSW6[5] = ON, DSW6[6] = OFF - CN4 header
- * DSW6[5] = OFF, DSW6[6] = ON - Grove2
- *
- * ADC1 AN102 can be exposed on ADC header or on Grove2 connector.
- *
- * T2H:
- * SW18[5] = ON, SW18[6] = OFF - CN42 header
- * SW18[5] = OFF, SW18[6] = ON - Grove2
- * N2H:
- * DSW6[7] = ON, DSW6[8] = OFF - CN4 header
- * DSW6[7] = OFF, DSW6[8] = ON - Grove2
- */
-&adc1 {
-	status = "okay";
-
-	channel@0 {
-		reg = <0x0>;
-	};
-
-	channel@1 {
-		reg = <0x1>;
-	};
-
-	channel@2 {
-		reg = <0x2>;
-	};
-
-	channel@3 {
-		reg = <0x3>;
-	};
-};
-- 
2.52.0
Re: [PATCH] arm64: dts: renesas: rzt2h/rzn2h-evk: Reorder ADC nodes
Posted by Geert Uytterhoeven 3 weeks, 3 days ago 
On Thu, 15 Jan 2026 at 13:22, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Reorder the ADC nodes in the dts/i files so they follow the same
> alphabetical ordering used elsewhere in these files.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.20.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Patchew 2.1-devel-b67e4c2

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