drivers/i2c/busses/i2c-xiic.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-)
Use generic device property accessors.
Make the clock optional assuming it's managed by firmware.
Signed-off-by: Abdurrahman Hussain <abdurrahman@nexthop.ai>
---
drivers/i2c/busses/i2c-xiic.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 28015d77599d..ee4731570977 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -1408,7 +1408,6 @@ static const struct i2c_adapter xiic_adapter = {
.algo = &xiic_algorithm,
};
-#if defined(CONFIG_OF)
static const struct xiic_version_data xiic_2_00 = {
.quirks = DYNAMIC_MODE_READ_BROKEN_BIT,
};
@@ -1419,13 +1418,12 @@ static const struct of_device_id xiic_of_match[] = {
{},
};
MODULE_DEVICE_TABLE(of, xiic_of_match);
-#endif
static int xiic_i2c_probe(struct platform_device *pdev)
{
struct xiic_i2c *i2c;
struct xiic_i2c_platform_data *pdata;
- const struct of_device_id *match;
+ const struct xiic_version_data *data;
struct resource *res;
int ret, irq;
u8 i;
@@ -1435,12 +1433,9 @@ static int xiic_i2c_probe(struct platform_device *pdev)
if (!i2c)
return -ENOMEM;
- match = of_match_node(xiic_of_match, pdev->dev.of_node);
- if (match && match->data) {
- const struct xiic_version_data *data = match->data;
-
+ data = device_get_match_data(&pdev->dev);
+ if (data)
i2c->quirks = data->quirks;
- }
i2c->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
if (IS_ERR(i2c->base))
@@ -1458,13 +1453,14 @@ static int xiic_i2c_probe(struct platform_device *pdev)
i2c_set_adapdata(&i2c->adap, i2c);
i2c->adap.dev.parent = &pdev->dev;
i2c->adap.dev.of_node = pdev->dev.of_node;
+ ACPI_COMPANION_SET(&i2c->adap.dev, ACPI_COMPANION(&pdev->dev));
snprintf(i2c->adap.name, sizeof(i2c->adap.name),
DRIVER_NAME " %s", pdev->name);
mutex_init(&i2c->lock);
spin_lock_init(&i2c->atomic_lock);
- i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL);
+ i2c->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
if (IS_ERR(i2c->clk))
return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk),
"failed to enable input clock.\n");
@@ -1477,8 +1473,8 @@ static int xiic_i2c_probe(struct platform_device *pdev)
/* SCL frequency configuration */
i2c->input_clk = clk_get_rate(i2c->clk);
- ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
- &i2c->i2c_clk);
+ ret = device_property_read_u32(&pdev->dev, "clock-frequency",
+ &i2c->i2c_clk);
/* If clock-frequency not specified in DT, do not configure in SW */
if (ret || i2c->i2c_clk > I2C_MAX_FAST_MODE_PLUS_FREQ)
i2c->i2c_clk = 0;
@@ -1493,7 +1489,7 @@ static int xiic_i2c_probe(struct platform_device *pdev)
}
i2c->singlemaster =
- of_property_read_bool(pdev->dev.of_node, "single-master");
+ device_property_read_bool(&pdev->dev, "single-master");
/*
* Detect endianness
--
2.52.0On Thu, Jan 15, 2026 at 12:28:46AM +0000, Abdurrahman Hussain wrote: > Use generic device property accessors. > Make the clock optional assuming it's managed by firmware. The generalisation parts are okay in a sense for prototyping, for ACPI-based platforms, we want to see the proper _HID allocated by a platform vendor (and maybe accompanied _CID allocated by the IP vendor). Also you need to reshuffle header inclusions (removing of* and adding proper headers following IWYU principle). ... Add struct device *dev = &pdev->dev; to the top of the function and use it everywhere. > i2c->adap.dev.of_node = pdev->dev.of_node; > + ACPI_COMPANION_SET(&i2c->adap.dev, ACPI_COMPANION(&pdev->dev)); Instead of two lines, switch to device_set_node(...); ... > - i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL); > + i2c->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL); > if (IS_ERR(i2c->clk)) > return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk), > "failed to enable input clock.\n"); This needs to be in the separate change explaining why this is okay to go with. -- With Best Regards, Andy Shevchenko
On Thu, Jan 15, 2026 at 12:28:46AM +0000, Abdurrahman Hussain wrote: > Use generic device property accessors. > Make the clock optional assuming it's managed by firmware. > > Signed-off-by: Abdurrahman Hussain <abdurrahman@nexthop.ai> On which hardware has this been tested?
> On Jan 15, 2026, at 5:02 AM, Wolfram Sang <wsa+renesas@sang-engineering.com> wrote:
>
> On Thu, Jan 15, 2026 at 12:28:46AM +0000, Abdurrahman Hussain wrote:
>> Use generic device property accessors.
>> Make the clock optional assuming it's managed by firmware.
>>
>> Signed-off-by: Abdurrahman Hussain <abdurrahman@nexthop.ai>
>
> On which hardware has this been tested?
>
This was tested on nexthop.ai data-center NH-4010 switch with Xilinx based FPGA.
The following ACPI ASL fragment was used to describe the device:
Device (I2C2) {
Name (_HID, "PRP0001")
Name (_CRS, ResourceTemplate () {
Memory32Fixed (ReadWrite, 0x80a40400, 0x00000200)
GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0,
"\\_SB.PCI0.GPP5.FPGA") { 10 }
})
Name (_DSD, Package () {
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "compatible", "xlnx,axi-iic-2.1" },
Package () { "single-master", 1 },
}
})
}
On 1/15/26 20:04, Abdurrahman Hussain wrote:
>
>
>> On Jan 15, 2026, at 5:02 AM, Wolfram Sang <wsa+renesas@sang-engineering.com> wrote:
>>
>> On Thu, Jan 15, 2026 at 12:28:46AM +0000, Abdurrahman Hussain wrote:
>>> Use generic device property accessors.
>>> Make the clock optional assuming it's managed by firmware.
>>>
>>> Signed-off-by: Abdurrahman Hussain <abdurrahman@nexthop.ai>
>>
>> On which hardware has this been tested?
>>
>
> This was tested on nexthop.ai data-center NH-4010 switch with Xilinx based FPGA.
>
> The following ACPI ASL fragment was used to describe the device:
>
> Device (I2C2) {
> Name (_HID, "PRP0001")
> Name (_CRS, ResourceTemplate () {
> Memory32Fixed (ReadWrite, 0x80a40400, 0x00000200)
> GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0,
> "\\_SB.PCI0.GPP5.FPGA") { 10 }
> })
> Name (_DSD, Package () {
> ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> Package () {
> Package () { "compatible", "xlnx,axi-iic-2.1" },
> Package () { "single-master", 1 },
> }
> })
> }
can you share more details about cpu and bootflow?
Thanks,
Michal
> On Jan 15, 2026, at 11:30 PM, Michal Simek <michal.simek@amd.com> wrote:
>
>
>
> On 1/15/26 20:04, Abdurrahman Hussain wrote:
>>> On Jan 15, 2026, at 5:02 AM, Wolfram Sang <wsa+renesas@sang-engineering.com> wrote:
>>>
>>> On Thu, Jan 15, 2026 at 12:28:46AM +0000, Abdurrahman Hussain wrote:
>>>> Use generic device property accessors.
>>>> Make the clock optional assuming it's managed by firmware.
>>>>
>>>> Signed-off-by: Abdurrahman Hussain <abdurrahman@nexthop.ai>
>>>
>>> On which hardware has this been tested?
>>>
>> This was tested on nexthop.ai data-center NH-4010 switch with Xilinx based FPGA.
>> The following ACPI ASL fragment was used to describe the device:
>> Device (I2C2) {
>> Name (_HID, "PRP0001")
>> Name (_CRS, ResourceTemplate () {
>> Memory32Fixed (ReadWrite, 0x80a40400, 0x00000200)
>> GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0,
>> "\\_SB.PCI0.GPP5.FPGA") { 10 }
>> })
>> Name (_DSD, Package () {
>> ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
>> Package () {
>> Package () { "compatible", "xlnx,axi-iic-2.1" },
>> Package () { "single-master", 1 },
>> }
>> })
>> }
>
> can you share more details about cpu and bootflow?
>
> Thanks,
> Michal
>
Hi Michal,
This is an AMD Ryzen Embedded V3C48 platform with Xilinx Artix 7 FPGA with multiple I2C and SPI IP blocks.
The FPGA sits on PCIE bus and has all the IP blocks memory mapped. I2C blocks also generate PCI MSI interrupts and we have implemented a custom irq_chip/gpio driver that creates the irq_domain hierarchy.
Adding these changes allowed us to benefit from the existing ACPI device enumeration in the kernel and re-use the existing drivers.
Thanks,
Abdurrahman
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