On 1/15/26 8:29 AM, Dmitry Baryshkov wrote:
> From: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
>
> The HPD state status is the 3 most significant bits, not 4 bits of the
> HPD_INT_STATUS register.
/me stares
BIT(28) is indeed not defined, at least on Hamoa.. Amazing luck things
worked..
>
> Fix the bit shift macro so that the correct bits are returned in
> msm_dp_aux_is_link_connected().
>
> Fixes: 19e52bcb27c2 ("drm/msm/dp: return correct connection status after suspend")
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> drivers/gpu/drm/msm/dp/dp_reg.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
> index 7c44d4e2cf13..3689642b7fc0 100644
> --- a/drivers/gpu/drm/msm/dp/dp_reg.h
> +++ b/drivers/gpu/drm/msm/dp/dp_reg.h
> @@ -68,8 +68,8 @@
> #define DP_DP_IRQ_HPD_INT_ACK (0x00000002)
> #define DP_DP_HPD_REPLUG_INT_ACK (0x00000004)
> #define DP_DP_HPD_UNPLUG_INT_ACK (0x00000008)
> -#define DP_DP_HPD_STATE_STATUS_BITS_MASK (0x0000000F)
> -#define DP_DP_HPD_STATE_STATUS_BITS_SHIFT (0x1C)
> +#define DP_DP_HPD_STATE_STATUS_BITS_MASK (0x00000007)
> +#define DP_DP_HPD_STATE_STATUS_BITS_SHIFT (0x1D)
This file could use some genmasking..
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad