Starting with sc7280(kodiak), the ICE will have its own device-tree node.
So add the qcom,ice property to reference it.
Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 938be8228d66..8a6a25ceabe1 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -140,6 +140,10 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
description: platform specific settings for DLL_CONFIG reg.
+ qcom,ice:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle to the Inline Crypto Engine node
+
iommus:
minItems: 1
maxItems: 8
--
2.34.1On Wed, Jan 14, 2026 at 03:18:47PM +0530, Neeraj Soni wrote: > Starting with sc7280(kodiak), the ICE will have its own device-tree node. > So add the qcom,ice property to reference it. > > Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com> > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml > index 938be8228d66..8a6a25ceabe1 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml > @@ -140,6 +140,10 @@ properties: > $ref: /schemas/types.yaml#/definitions/uint32 > description: platform specific settings for DLL_CONFIG reg. > > + qcom,ice: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: phandle to the Inline Crypto Engine node Description should also say: for what purpose. You either have this phandle or ICE address space on sc7280 and newer. You cannot have both, so your schema should encode it properly. Otherwise you just sent something which already was on the list and it even was reviewed: https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/ You even copied the commit msg but did copy the authorship! Anyway v3 and v4 were not correct and probably v2 should be used after adjusting it with my comments. Best regards, Krzysztof
Hi, On 1/15/2026 2:33 PM, Krzysztof Kozlowski wrote: > On Wed, Jan 14, 2026 at 03:18:47PM +0530, Neeraj Soni wrote: >> Starting with sc7280(kodiak), the ICE will have its own device-tree node. >> So add the qcom,ice property to reference it. >> >> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com> >> --- >> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >> index 938be8228d66..8a6a25ceabe1 100644 >> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >> @@ -140,6 +140,10 @@ properties: >> $ref: /schemas/types.yaml#/definitions/uint32 >> description: platform specific settings for DLL_CONFIG reg. >> >> + qcom,ice: >> + $ref: /schemas/types.yaml#/definitions/phandle >> + description: phandle to the Inline Crypto Engine node > > Description should also say: for what purpose. > > You either have this phandle or ICE address space on sc7280 and newer. > You cannot have both, so your schema should encode it properly. > Sure. I will update this in next patch. > Otherwise you just sent something which already was on the list and it > even was reviewed: > > https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/ > > You even copied the commit msg but did copy the authorship! > Sure. Thanks for pointing out. I will fix the authorship in next patch. > Anyway v3 and v4 were not correct and probably v2 should be used after > adjusting it with my comments. > Okay. As i see your comment in v2 here: https://lore.kernel.org/all/c8eea30f-5ea2-cfc9-273a-3c6e99a316b9@linaro.org/ i guess what you want is not to drop the entries for clock but rather capture it in the "description" of the ICE phandle entry. Is this understanding correct? > > Best regards, > Krzysztof > Regards, Neeraj
On 16/01/2026 07:50, Neeraj Soni wrote: > Hi, > > On 1/15/2026 2:33 PM, Krzysztof Kozlowski wrote: >> On Wed, Jan 14, 2026 at 03:18:47PM +0530, Neeraj Soni wrote: >>> Starting with sc7280(kodiak), the ICE will have its own device-tree node. >>> So add the qcom,ice property to reference it. >>> >>> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com> >>> --- >>> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>> index 938be8228d66..8a6a25ceabe1 100644 >>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>> @@ -140,6 +140,10 @@ properties: >>> $ref: /schemas/types.yaml#/definitions/uint32 >>> description: platform specific settings for DLL_CONFIG reg. >>> >>> + qcom,ice: >>> + $ref: /schemas/types.yaml#/definitions/phandle >>> + description: phandle to the Inline Crypto Engine node >> >> Description should also say: for what purpose. >> >> You either have this phandle or ICE address space on sc7280 and newer. >> You cannot have both, so your schema should encode it properly. >> > Sure. I will update this in next patch. > >> Otherwise you just sent something which already was on the list and it >> even was reviewed: >> >> https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/ >> >> You even copied the commit msg but did copy the authorship! >> > Sure. Thanks for pointing out. I will fix the authorship in next patch. If you add if:then: cases, the patch will differ, so make it your own. But sending exactly the same patch with the same commit msg as what is already on the lists under your own name is not correct. > >> Anyway v3 and v4 were not correct and probably v2 should be used after >> adjusting it with my comments. >> > Okay. As i see your comment in v2 here: > https://lore.kernel.org/all/c8eea30f-5ea2-cfc9-273a-3c6e99a316b9@linaro.org/ > > i guess what you want is not to drop the entries for clock but rather capture it > in the "description" of the ICE phandle entry. Is this understanding correct? Clocks should not be touched, but reg should. Best regards, Krzysztof
Hi,
On 1/16/2026 12:48 PM, Krzysztof Kozlowski wrote:
> On 16/01/2026 07:50, Neeraj Soni wrote:
>> Hi,
>>
>> On 1/15/2026 2:33 PM, Krzysztof Kozlowski wrote:
>>> On Wed, Jan 14, 2026 at 03:18:47PM +0530, Neeraj Soni wrote:
>>>> Starting with sc7280(kodiak), the ICE will have its own device-tree node.
>>>> So add the qcom,ice property to reference it.
>>>>
>>>> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
>>>> ---
>>>> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 4 ++++
>>>> 1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>>> index 938be8228d66..8a6a25ceabe1 100644
>>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>>> @@ -140,6 +140,10 @@ properties:
>>>> $ref: /schemas/types.yaml#/definitions/uint32
>>>> description: platform specific settings for DLL_CONFIG reg.
>>>>
>>>> + qcom,ice:
>>>> + $ref: /schemas/types.yaml#/definitions/phandle
>>>> + description: phandle to the Inline Crypto Engine node
>>>
>>> Description should also say: for what purpose.
>>>
>>> You either have this phandle or ICE address space on sc7280 and newer.
>>> You cannot have both, so your schema should encode it properly.
>>>
>> Sure. I will update this in next patch.
>>
>>> Otherwise you just sent something which already was on the list and it
>>> even was reviewed:
>>>
>>> https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/
>>>
>>> You even copied the commit msg but did copy the authorship!
>>>
>> Sure. Thanks for pointing out. I will fix the authorship in next patch.
>
> If you add if:then: cases, the patch will differ, so make it your own.
Okay.
> But sending exactly the same patch with the same commit msg as what is
> already on the lists under your own name is not correct.
> >>
Okay this was not intended and have taken care of authorship in my other posts but i will ensure
not to repeat in future.
>>> Anyway v3 and v4 were not correct and probably v2 should be used after
>>> adjusting it with my comments.
>>>
>> Okay. As i see your comment in v2 here:
>> https://lore.kernel.org/all/c8eea30f-5ea2-cfc9-273a-3c6e99a316b9@linaro.org/
>>
>> i guess what you want is not to drop the entries for clock but rather capture it
>> in the "description" of the ICE phandle entry. Is this understanding correct?
>
> Clocks should not be touched, but reg should.
>
Okay but In sdhci-msm.yaml file:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml#n78
the currenty entries for "reg-names" do not specify for which hardware register range they are added. So shall i add something like
this:
-if
required
-qcom,ice
then
properties:
reg:
minItems: 1
maxItems: 3
reg-names:
minItems: 1
maxItems: 3
else
properties:
reg:
minItems: 1
maxItems: 4
reg-names:
minItems: 1
maxItems: 4
Indicating that reg: maxItems: and reg-names: max: will be "3" if seperate ICE phandle is added since the ICE register entries will not be needed.
>
> Best regards,
> Krzysztof
>
On 19/01/2026 10:47, Neeraj Soni wrote: > Hi, > > On 1/16/2026 12:48 PM, Krzysztof Kozlowski wrote: >> On 16/01/2026 07:50, Neeraj Soni wrote: >>> Hi, >>> >>> On 1/15/2026 2:33 PM, Krzysztof Kozlowski wrote: >>>> On Wed, Jan 14, 2026 at 03:18:47PM +0530, Neeraj Soni wrote: >>>>> Starting with sc7280(kodiak), the ICE will have its own device-tree node. >>>>> So add the qcom,ice property to reference it. >>>>> >>>>> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com> >>>>> --- >>>>> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 4 ++++ >>>>> 1 file changed, 4 insertions(+) >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>>>> index 938be8228d66..8a6a25ceabe1 100644 >>>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml >>>>> @@ -140,6 +140,10 @@ properties: >>>>> $ref: /schemas/types.yaml#/definitions/uint32 >>>>> description: platform specific settings for DLL_CONFIG reg. >>>>> >>>>> + qcom,ice: >>>>> + $ref: /schemas/types.yaml#/definitions/phandle >>>>> + description: phandle to the Inline Crypto Engine node >>>> >>>> Description should also say: for what purpose. >>>> >>>> You either have this phandle or ICE address space on sc7280 and newer. >>>> You cannot have both, so your schema should encode it properly. >>>> >>> Sure. I will update this in next patch. >>> >>>> Otherwise you just sent something which already was on the list and it >>>> even was reviewed: >>>> >>>> https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/ >>>> >>>> You even copied the commit msg but did copy the authorship! >>>> >>> Sure. Thanks for pointing out. I will fix the authorship in next patch. >> >> If you add if:then: cases, the patch will differ, so make it your own. > > Okay. > >> But sending exactly the same patch with the same commit msg as what is >> already on the lists under your own name is not correct. >>>> > Okay this was not intended and have taken care of authorship in my other posts but i will ensure > not to repeat in future. > >>>> Anyway v3 and v4 were not correct and probably v2 should be used after >>>> adjusting it with my comments. >>>> >>> Okay. As i see your comment in v2 here: >>> https://lore.kernel.org/all/c8eea30f-5ea2-cfc9-273a-3c6e99a316b9@linaro.org/ >>> >>> i guess what you want is not to drop the entries for clock but rather capture it >>> in the "description" of the ICE phandle entry. Is this understanding correct? >> >> Clocks should not be touched, but reg should. >> > Okay but In sdhci-msm.yaml file: > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml#n78 > > the currenty entries for "reg-names" do not specify for which hardware register range they are added. So shall i add something like Read the rest of the binding. And finally wrap your emails correctly. I am bored asking this over and over, so if there is silence in the future - you can guess why. Best regards, Krzysztof
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