spi: cadence-quadspi: add PHY tuning support

[RFC PATCH v2 03/12] mtd: spinand: perform controller tuning during probe

Posted by Santhosh Kumar K 3 weeks, 5 days ago

SPI controllers may need tuning for reliable high-speed operation.
Without it, controllers use conservative timing that limits performance.

Call spi_mem_execute_tuning() during probe to optimize timing for
the device's read and write operations. Failures are non-fatal as
controllers fall back to default timing.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
---
 drivers/mtd/nand/spi/core.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 0346916b032b..2a45d1047736 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -1658,6 +1658,7 @@ static int spinand_probe(struct spi_mem *mem)
 {
 	struct spinand_device *spinand;
 	struct mtd_info *mtd;
+	struct spi_mem_op read_op, write_op;
 	int ret;
 
 	spinand = devm_kzalloc(&mem->spi->dev, sizeof(*spinand),
@@ -1676,6 +1677,19 @@ static int spinand_probe(struct spi_mem *mem)
 	if (ret)
 		return ret;
 
+	read_op = *spinand->op_templates.read_cache;
+	write_op = *spinand->op_templates.write_cache;
+
+	ret = spi_mem_execute_tuning(mem, &read_op, &write_op);
+	if (ret && ret != -EOPNOTSUPP) {
+		dev_warn(&mem->spi->dev, "Failed to execute PHY tuning: %d\n",
+			 ret);
+		/*
+		 * Tuning failure is non-fatal; the controller falls back to
+		 * default timing, reducing speed but ensuring operation.
+		 */
+	}
+
 	ret = mtd_device_register(mtd, NULL, 0);
 	if (ret)
 		goto err_spinand_cleanup;
-- 
2.34.1

Re: [RFC PATCH v2 03/12] mtd: spinand: perform controller tuning during probe

Posted by Miquel Raynal 3 days, 18 hours ago

Hi Santhosh,

On 13/01/2026 at 19:46:08 +0530, Santhosh Kumar K <s-k6@ti.com> wrote:

> SPI controllers may need tuning for reliable high-speed operation.
> Without it, controllers use conservative timing that limits performance.
>
> Call spi_mem_execute_tuning() during probe to optimize timing for
> the device's read and write operations. Failures are non-fatal as
> controllers fall back to default timing.
>
> Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
> ---
>  drivers/mtd/nand/spi/core.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index 0346916b032b..2a45d1047736 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -1658,6 +1658,7 @@ static int spinand_probe(struct spi_mem *mem)
>  {
>  	struct spinand_device *spinand;
>  	struct mtd_info *mtd;
> +	struct spi_mem_op read_op, write_op;
>  	int ret;
>  
>  	spinand = devm_kzalloc(&mem->spi->dev, sizeof(*spinand),
> @@ -1676,6 +1677,19 @@ static int spinand_probe(struct spi_mem *mem)
>  	if (ret)
>  		return ret;
>  
> +	read_op = *spinand->op_templates.read_cache;
> +	write_op = *spinand->op_templates.write_cache;

These will become:

 +	read_op = *spinand->op_templates->read_cache;
 +	write_op = *spinand->op_templates->write_cache;

after rebasing on nand/next or next -rc1.

> +
> +	ret = spi_mem_execute_tuning(mem, &read_op, &write_op);
> +	if (ret && ret != -EOPNOTSUPP) {
> +		dev_warn(&mem->spi->dev, "Failed to execute PHY tuning: %d\n",
> +			 ret);
> +		/*
> +		 * Tuning failure is non-fatal; the controller falls back to
> +		 * default timing, reducing speed but ensuring operation.
> +		 */
> +	}

Can we move the comment before spi_mem_execute_timing()? Then no more
brackets needed and it will be easier to read (imo).

LGTM otherwise.

Thanks,
Miquèl

Re: [RFC PATCH v2 03/12] mtd: spinand: perform controller tuning during probe

Posted by Santhosh Kumar K 2 days, 16 hours ago

Hi Miquel,

On 05/02/26 23:05, Miquel Raynal wrote:
> Hi Santhosh,
> 
> On 13/01/2026 at 19:46:08 +0530, Santhosh Kumar K <s-k6@ti.com> wrote:
> 
>> SPI controllers may need tuning for reliable high-speed operation.
>> Without it, controllers use conservative timing that limits performance.
>>
>> Call spi_mem_execute_tuning() during probe to optimize timing for
>> the device's read and write operations. Failures are non-fatal as
>> controllers fall back to default timing.
>>
>> Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
>> ---
>>   drivers/mtd/nand/spi/core.c | 14 ++++++++++++++
>>   1 file changed, 14 insertions(+)
>>
>> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
>> index 0346916b032b..2a45d1047736 100644
>> --- a/drivers/mtd/nand/spi/core.c
>> +++ b/drivers/mtd/nand/spi/core.c
>> @@ -1658,6 +1658,7 @@ static int spinand_probe(struct spi_mem *mem)
>>   {
>>   	struct spinand_device *spinand;
>>   	struct mtd_info *mtd;
>> +	struct spi_mem_op read_op, write_op;
>>   	int ret;
>>   
>>   	spinand = devm_kzalloc(&mem->spi->dev, sizeof(*spinand),
>> @@ -1676,6 +1677,19 @@ static int spinand_probe(struct spi_mem *mem)
>>   	if (ret)
>>   		return ret;
>>   
>> +	read_op = *spinand->op_templates.read_cache;
>> +	write_op = *spinand->op_templates.write_cache;
> 
> These will become:
> 
>   +	read_op = *spinand->op_templates->read_cache;
>   +	write_op = *spinand->op_templates->write_cache;
> 
> after rebasing on nand/next or next -rc1.

Noted!

> 
>> +
>> +	ret = spi_mem_execute_tuning(mem, &read_op, &write_op);
>> +	if (ret && ret != -EOPNOTSUPP) {
>> +		dev_warn(&mem->spi->dev, "Failed to execute PHY tuning: %d\n",
>> +			 ret);
>> +		/*
>> +		 * Tuning failure is non-fatal; the controller falls back to
>> +		 * default timing, reducing speed but ensuring operation.
>> +		 */
>> +	}
> 
> Can we move the comment before spi_mem_execute_timing()? Then no more
> brackets needed and it will be easier to read (imo).

Yeah, I agree on the readability concern - will move them in v3.

Thanks,
Santhosh.

> 
> LGTM otherwise.
> 
> Thanks,
> Miquèl