From: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
one USB Type-A, and a fingerprint reader connected over USB. Each of these
3 Type-C ports are connected to one of the USB combo PHYs and one of the
M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
dedicated NXP PTN3222.
So enable all needed controllers, PHYs and repeaters, while describing
their supplies. Also describe the PMIC glink graph for Type-C connectors.
Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur-crd.dts | 283 ++++++++++++++++++++++++++++++++
1 file changed, 283 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
index 7c168e813f1e..3188bfa27bea 100644
--- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
+++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
@@ -56,6 +56,97 @@ key-volume-up {
};
};
+ pmic-glink {
+ compatible = "qcom,glymur-pmic-glink";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_hs_in: endpoint {
+ remote-endpoint = <&usb1_ss0_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss_in: endpoint {
+ remote-endpoint = <&usb1_ss0_qmpphy_out>;
+ };
+ };
+ };
+ };
+
+ connector@1 {
+ compatible = "usb-c-connector";
+ reg = <1>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_hs_in1: endpoint {
+ remote-endpoint = <&usb1_ss1_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss_in1: endpoint {
+ remote-endpoint = <&usb1_ss1_qmpphy_out>;
+ };
+ };
+ };
+ };
+
+ connector@2 {
+ compatible = "usb-c-connector";
+ reg = <2>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_hs_in2: endpoint {
+ remote-endpoint = <&usb1_ss2_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss_in2: endpoint {
+ remote-endpoint = <&usb1_ss2_qmpphy_out>;
+ };
+ };
+ };
+ };
+ };
+
vreg_nvme: regulator-nvme {
compatible = "regulator-fixed";
@@ -331,6 +422,72 @@ trip1 {
};
};
+&i2c5 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ ptn3222_0: redriver@43 {
+ compatible = "nxp,ptn3222";
+ reg = <0x43>;
+
+ reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
+
+ vdd3v3-supply = <&vreg_l8b_e0_1p50>;
+ vdd1v8-supply = <&vreg_l15b_e0_1p8>;
+
+ #phy-cells = <0>;
+ };
+
+ ptn3222_1: redriver@4f {
+ compatible = "nxp,ptn3222";
+ reg = <0x4f>;
+
+ reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
+
+ vdd3v3-supply = <&vreg_l8b_e0_1p50>;
+ vdd1v8-supply = <&vreg_l15b_e0_1p8>;
+
+ #phy-cells = <0>;
+ };
+
+ ptn3222_2: redriver@47 {
+ compatible = "nxp,ptn3222";
+ reg = <0x47>;
+
+ reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
+
+ vdd3v3-supply = <&vreg_l8b_e0_1p50>;
+ vdd1v8-supply = <&vreg_l15b_e0_1p8>;
+
+ #phy-cells = <0>;
+ };
+};
+
+&smb2370_j_e2_eusb2_repeater {
+ vdd18-supply = <&vreg_l15b_e0_1p8>;
+ vdd3-supply = <&vreg_l7b_e0_2p79>;
+};
+
+&smb2370_k_e2_eusb2_repeater {
+ vdd18-supply = <&vreg_l15b_e0_1p8>;
+ vdd3-supply = <&vreg_l7b_e0_2p79>;
+};
+
+&smb2370_l_e2_eusb2_repeater {
+ vdd18-supply = <&vreg_l15b_e0_1p8>;
+ vdd3-supply = <&vreg_l7b_e0_2p79>;
+};
+
+&usb1_ss0_hsphy {
+ vdd-supply = <&vreg_l3f_e0_0p72>;
+ vdda12-supply = <&vreg_l4h_e0_1p2>;
+
+ phys = <&smb2370_j_e2_eusb2_repeater>;
+
+ status = "okay";
+};
+
&tlmm {
gpio-reserved-ranges = <4 4>, /* EC TZ Secure I3C */
<10 2>, /* OOB UART */
@@ -858,3 +1015,129 @@ &pcie6_port0 {
reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
};
+
+&usb1_ss0_qmpphy {
+ vdda-phy-supply = <&vreg_l4h_e0_1p2>;
+ vdda-pll-supply = <&vreg_l3f_e0_0p72>;
+ refgen-supply = <&vreg_l2f_e0_0p82>;
+
+ status = "okay";
+};
+
+&usb1_ss0_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss_in>;
+};
+
+&usb1_ss0_dwc3_hs {
+ remote-endpoint = <&pmic_glink_hs_in>;
+};
+
+&usb1_ss0 {
+ status = "okay";
+};
+
+&usb1_ss1_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss_in1>;
+};
+
+&usb1_ss1_dwc3_hs {
+ remote-endpoint = <&pmic_glink_hs_in1>;
+};
+
+&usb1_ss1_hsphy {
+ vdd-supply = <&vreg_l3f_e0_0p72>;
+ vdda12-supply = <&vreg_l4h_e0_1p2>;
+
+ phys = <&smb2370_k_e2_eusb2_repeater>;
+
+ status = "okay";
+};
+
+&usb1_ss1_qmpphy {
+ vdda-phy-supply = <&vreg_l4h_e0_1p2>;
+ vdda-pll-supply = <&vreg_l1h_e0_0p89>;
+ refgen-supply = <&vreg_l2f_e0_0p82>;
+
+ status = "okay";
+};
+
+&usb1_ss1 {
+ status = "okay";
+};
+
+&usb1_ss2_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss_in2>;
+};
+
+&usb1_ss2_dwc3_hs {
+ remote-endpoint = <&pmic_glink_hs_in2>;
+};
+
+&usb1_ss2_hsphy {
+ vdd-supply = <&vreg_l4c_e1_0p72>;
+ vdda12-supply = <&vreg_l4f_e1_1p08>;
+
+ phys = <&smb2370_l_e2_eusb2_repeater>;
+
+ status = "okay";
+};
+
+&usb1_ss2_qmpphy {
+ vdda-phy-supply = <&vreg_l4f_e1_1p08>;
+ vdda-pll-supply = <&vreg_l4c_e1_0p72>;
+ refgen-supply = <&vreg_l1c_e1_0p82>;
+
+ status = "okay";
+};
+
+&usb1_ss2 {
+ status = "okay";
+};
+
+&usb_2 {
+ status = "okay";
+};
+
+&usb_2_hsphy {
+ phys = <&ptn3222_2>;
+
+ status = "okay";
+};
+
+&usb_mp_hsphy0 {
+ vdd-supply = <&vreg_l2h_e0_0p72>;
+ vdda12-supply = <&vreg_l4h_e0_1p2>;
+
+ phys = <&ptn3222_0>;
+
+ status = "okay";
+};
+
+&usb_mp_hsphy1 {
+ vdd-supply = <&vreg_l2h_e0_0p72>;
+ vdda12-supply = <&vreg_l4h_e0_1p2>;
+
+ phys = <&ptn3222_1>;
+
+ status = "okay";
+};
+
+&usb_mp_qmpphy0 {
+ vdda-phy-supply = <&vreg_l4h_e0_1p2>;
+ vdda-pll-supply = <&vreg_l2h_e0_0p72>;
+ refgen-supply = <&vreg_l4f_e1_1p08>;
+
+ status = "okay";
+};
+
+&usb_mp_qmpphy1 {
+ vdda-phy-supply = <&vreg_l4h_e0_1p2>;
+ vdda-pll-supply = <&vreg_l2h_e0_0p72>;
+ refgen-supply = <&vreg_l4f_e1_1p08>;
+
+ status = "okay";
+};
+
+&usb_mp {
+ status = "okay";
+};
--
2.48.1On Tue, Jan 13, 2026 at 02:33:06PM +0200, Abel Vesa wrote:
> The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
> one USB Type-A, and a fingerprint reader connected over USB. Each of these
> 3 Type-C ports are connected to one of the USB combo PHYs and one of the
> M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
> via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
^^^^^^^^^
Small nit, this should be USB3 UNI PHY.
> is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
> eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
s/SMB2360/SMB2370/, as corroborated below in the patch.
Thanks,
Jack
On 1/13/2026 6:03 PM, Abel Vesa wrote:
> From: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
>
> The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
> one USB Type-A, and a fingerprint reader connected over USB. Each of these
> 3 Type-C ports are connected to one of the USB combo PHYs and one of the
> M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
> via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
> is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
> eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
> dedicated NXP PTN3222.
>
> So enable all needed controllers, PHYs and repeaters, while describing
> their supplies. Also describe the PMIC glink graph for Type-C connectors.
>
> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/glymur-crd.dts | 283 ++++++++++++++++++++++++++++++++
> 1 file changed, 283 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> index 7c168e813f1e..3188bfa27bea 100644
> --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> @@ -56,6 +56,97 @@ key-volume-up {
> };
> };
>
> + pmic-glink {
> + compatible = "qcom,glymur-pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> +
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_hs_in: endpoint {
> + remote-endpoint = <&usb1_ss0_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss_in: endpoint {
> + remote-endpoint = <&usb1_ss0_qmpphy_out>;
> + };
> + };
> + };
> + };
> +
> + connector@1 {
> + compatible = "usb-c-connector";
> + reg = <1>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_hs_in1: endpoint {
> + remote-endpoint = <&usb1_ss1_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss_in1: endpoint {
> + remote-endpoint = <&usb1_ss1_qmpphy_out>;
> + };
> + };
> + };
> + };
> +
> + connector@2 {
> + compatible = "usb-c-connector";
> + reg = <2>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_hs_in2: endpoint {
> + remote-endpoint = <&usb1_ss2_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss_in2: endpoint {
> + remote-endpoint = <&usb1_ss2_qmpphy_out>;
> + };
> + };
> + };
> + };
> + };
> +
> vreg_nvme: regulator-nvme {
> compatible = "regulator-fixed";
>
> @@ -331,6 +422,72 @@ trip1 {
> };
> };
>
> +&i2c5 {
> + clock-frequency = <400000>;
> +
> + status = "okay";
> +
> + ptn3222_0: redriver@43 {
> + compatible = "nxp,ptn3222";
> + reg = <0x43>;
> +
> + reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
> +
> + vdd3v3-supply = <&vreg_l8b_e0_1p50>;
> + vdd1v8-supply = <&vreg_l15b_e0_1p8>;
> +
> + #phy-cells = <0>;
> + };
> +
> + ptn3222_1: redriver@4f {
> + compatible = "nxp,ptn3222";
> + reg = <0x4f>;
> +
> + reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
> +
> + vdd3v3-supply = <&vreg_l8b_e0_1p50>;
> + vdd1v8-supply = <&vreg_l15b_e0_1p8>;
> +
> + #phy-cells = <0>;
> + };
> +
> + ptn3222_2: redriver@47 {
> + compatible = "nxp,ptn3222";
> + reg = <0x47>;
> +
> + reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
> +
> + vdd3v3-supply = <&vreg_l8b_e0_1p50>;
> + vdd1v8-supply = <&vreg_l15b_e0_1p8>;
> +
> + #phy-cells = <0>;
> + };
> +};
> +
> +&smb2370_j_e2_eusb2_repeater {
> + vdd18-supply = <&vreg_l15b_e0_1p8>;
> + vdd3-supply = <&vreg_l7b_e0_2p79>;
> +};
> +
> +&smb2370_k_e2_eusb2_repeater {
> + vdd18-supply = <&vreg_l15b_e0_1p8>;
> + vdd3-supply = <&vreg_l7b_e0_2p79>;
> +};
> +
> +&smb2370_l_e2_eusb2_repeater {
> + vdd18-supply = <&vreg_l15b_e0_1p8>;
> + vdd3-supply = <&vreg_l7b_e0_2p79>;
> +};
> +
> +&usb1_ss0_hsphy {
> + vdd-supply = <&vreg_l3f_e0_0p72>;
> + vdda12-supply = <&vreg_l4h_e0_1p2>;
> +
> + phys = <&smb2370_j_e2_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> &tlmm {
> gpio-reserved-ranges = <4 4>, /* EC TZ Secure I3C */
> <10 2>, /* OOB UART */
> @@ -858,3 +1015,129 @@ &pcie6_port0 {
> reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
> wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
> };
> +
> +&usb1_ss0_qmpphy {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l3f_e0_0p72>;
> + refgen-supply = <&vreg_l2f_e0_0p82>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss0_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss_in>;
> +};
> +
> +&usb1_ss0_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in>;
> +};
> +
> +&usb1_ss0 {
> + status = "okay";
> +};
> +
> +&usb1_ss1_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss_in1>;
> +};
> +
> +&usb1_ss1_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in1>;
> +};
> +
> +&usb1_ss1_hsphy {
> + vdd-supply = <&vreg_l3f_e0_0p72>;
> + vdda12-supply = <&vreg_l4h_e0_1p2>;
> +
Board clocks are missing from this and &usb1_ss0_hsphy node
> + phys = <&smb2370_k_e2_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss1_qmpphy {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l1h_e0_0p89>;
> + refgen-supply = <&vreg_l2f_e0_0p82>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss1 {
> + status = "okay";
> +};
> +
> +&usb1_ss2_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss_in2>;
> +};
> +
> +&usb1_ss2_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in2>;
> +};
> +
> +&usb1_ss2_hsphy {
> + vdd-supply = <&vreg_l4c_e1_0p72>;
> + vdda12-supply = <&vreg_l4f_e1_1p08>;
> +
> + phys = <&smb2370_l_e2_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss2_qmpphy {
> + vdda-phy-supply = <&vreg_l4f_e1_1p08>;
> + vdda-pll-supply = <&vreg_l4c_e1_0p72>;
> + refgen-supply = <&vreg_l1c_e1_0p82>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss2 {
> + status = "okay";
> +};
> +
> +&usb_2 {
> + status = "okay";
> +};
> +
> +&usb_2_hsphy {
> + phys = <&ptn3222_2>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_hsphy0 {
> + vdd-supply = <&vreg_l2h_e0_0p72>;
> + vdda12-supply = <&vreg_l4h_e0_1p2>;
> +
> + phys = <&ptn3222_0>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_hsphy1 {
> + vdd-supply = <&vreg_l2h_e0_0p72>;
> + vdda12-supply = <&vreg_l4h_e0_1p2>;
> +
> + phys = <&ptn3222_1>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_qmpphy0 {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l2h_e0_0p72>;
> + refgen-supply = <&vreg_l4f_e1_1p08>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_qmpphy1 {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l2h_e0_0p72>;
> + refgen-supply = <&vreg_l4f_e1_1p08>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp {
> + status = "okay";
> +};
>
On 26-01-20 17:37:48, Pankaj Patil wrote:
> On 1/13/2026 6:03 PM, Abel Vesa wrote:
> > From: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> >
> > The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
> > one USB Type-A, and a fingerprint reader connected over USB. Each of these
> > 3 Type-C ports are connected to one of the USB combo PHYs and one of the
> > M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
> > via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
> > is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
> > eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
> > dedicated NXP PTN3222.
> >
> > So enable all needed controllers, PHYs and repeaters, while describing
> > their supplies. Also describe the PMIC glink graph for Type-C connectors.
> >
> > Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> > Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/glymur-crd.dts | 283 ++++++++++++++++++++++++++++++++
> > 1 file changed, 283 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > index 7c168e813f1e..3188bfa27bea 100644
> > --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > @@ -858,3 +1015,129 @@ &pcie6_port0 {
> > reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
> > wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
> > };
> > +
> > +&usb1_ss0_qmpphy {
> > + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> > + vdda-pll-supply = <&vreg_l3f_e0_0p72>;
> > + refgen-supply = <&vreg_l2f_e0_0p82>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb1_ss0_qmpphy_out {
> > + remote-endpoint = <&pmic_glink_ss_in>;
> > +};
> > +
> > +&usb1_ss0_dwc3_hs {
> > + remote-endpoint = <&pmic_glink_hs_in>;
> > +};
> > +
> > +&usb1_ss0 {
> > + status = "okay";
> > +};
> > +
> > +&usb1_ss1_qmpphy_out {
> > + remote-endpoint = <&pmic_glink_ss_in1>;
> > +};
> > +
> > +&usb1_ss1_dwc3_hs {
> > + remote-endpoint = <&pmic_glink_hs_in1>;
> > +};
> > +
> > +&usb1_ss1_hsphy {
> > + vdd-supply = <&vreg_l3f_e0_0p72>;
> > + vdda12-supply = <&vreg_l4h_e0_1p2>;
> > +
>
> Board clocks are missing from this and &usb1_ss0_hsphy node
Board clocks? This PHYs are on SoC. Usually they do not have
dedicated clocks comming from off-chip. Am I missing something
w.r.t. this specific SoC ?
On 20/01/2026 13:07, Pankaj Patil wrote: > On 1/13/2026 6:03 PM, Abel Vesa wrote: >> From: Wesley Cheng <wesley.cheng@oss.qualcomm.com> >> >> The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports, >> one USB Type-A, and a fingerprint reader connected over USB. Each of these >> 3 Type-C ports are connected to one of the USB combo PHYs and one of the >> M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller >> via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader >> is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated >> eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or >> dedicated NXP PTN3222. >> >> So enable all needed controllers, PHYs and repeaters, while describing >> their supplies. Also describe the PMIC glink graph for Type-C connectors. >> >> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> >> Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >> --- Please kindly trim the replies from unnecessary context. It makes it much easier to find new content. I went through entire pages of quoted text and found no relevant answer... probably because it was deep hidden in these pages of irrelevant quote. Best regards, Krzysztof
On Tue, Jan 13, 2026 at 02:33:06PM +0200, Abel Vesa wrote:
> From: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
>
> The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
> one USB Type-A, and a fingerprint reader connected over USB. Each of these
> 3 Type-C ports are connected to one of the USB combo PHYs and one of the
> M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
> via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
> is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
> eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
> dedicated NXP PTN3222.
>
> So enable all needed controllers, PHYs and repeaters, while describing
> their supplies. Also describe the PMIC glink graph for Type-C connectors.
>
> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/glymur-crd.dts | 283 ++++++++++++++++++++++++++++++++
> 1 file changed, 283 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> index 7c168e813f1e..3188bfa27bea 100644
> --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> @@ -56,6 +56,97 @@ key-volume-up {
> };
> };
>
> + pmic-glink {
> + compatible = "qcom,glymur-pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
No orientation-gpios?
> +
> @@ -858,3 +1015,129 @@ &pcie6_port0 {
> reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
> wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
> };
> +
> +&usb1_ss0_qmpphy {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l3f_e0_0p72>;
> + refgen-supply = <&vreg_l2f_e0_0p82>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss0_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss_in>;
> +};
> +
> +&usb1_ss0_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in>;
> +};
This is obviously not sorted. Please sort the nodes.
> +
> +&usb1_ss0 {
> + status = "okay";
> +};
> +
> +&usb1_ss1_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss_in1>;
> +};
> +
> +&usb1_ss1_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in1>;
> +};
> +
> +&usb1_ss1_hsphy {
> + vdd-supply = <&vreg_l3f_e0_0p72>;
> + vdda12-supply = <&vreg_l4h_e0_1p2>;
> +
> + phys = <&smb2370_k_e2_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss1_qmpphy {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l1h_e0_0p89>;
> + refgen-supply = <&vreg_l2f_e0_0p82>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss1 {
> + status = "okay";
> +};
> +
> +&usb1_ss2_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss_in2>;
> +};
> +
> +&usb1_ss2_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in2>;
> +};
> +
> +&usb1_ss2_hsphy {
> + vdd-supply = <&vreg_l4c_e1_0p72>;
> + vdda12-supply = <&vreg_l4f_e1_1p08>;
> +
> + phys = <&smb2370_l_e2_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss2_qmpphy {
> + vdda-phy-supply = <&vreg_l4f_e1_1p08>;
> + vdda-pll-supply = <&vreg_l4c_e1_0p72>;
> + refgen-supply = <&vreg_l1c_e1_0p82>;
> +
> + status = "okay";
> +};
> +
> +&usb1_ss2 {
> + status = "okay";
> +};
> +
> +&usb_2 {
> + status = "okay";
> +};
> +
> +&usb_2_hsphy {
> + phys = <&ptn3222_2>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_hsphy0 {
> + vdd-supply = <&vreg_l2h_e0_0p72>;
> + vdda12-supply = <&vreg_l4h_e0_1p2>;
> +
> + phys = <&ptn3222_0>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_hsphy1 {
> + vdd-supply = <&vreg_l2h_e0_0p72>;
> + vdda12-supply = <&vreg_l4h_e0_1p2>;
> +
> + phys = <&ptn3222_1>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_qmpphy0 {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l2h_e0_0p72>;
> + refgen-supply = <&vreg_l4f_e1_1p08>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_qmpphy1 {
> + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> + vdda-pll-supply = <&vreg_l2h_e0_0p72>;
> + refgen-supply = <&vreg_l4f_e1_1p08>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp {
> + status = "okay";
> +};
>
> --
> 2.48.1
>
--
With best wishes
Dmitry
On 26-01-13 20:02:25, Dmitry Baryshkov wrote:
> On Tue, Jan 13, 2026 at 02:33:06PM +0200, Abel Vesa wrote:
> > From: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> >
> > The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
> > one USB Type-A, and a fingerprint reader connected over USB. Each of these
> > 3 Type-C ports are connected to one of the USB combo PHYs and one of the
> > M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
> > via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
> > is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
> > eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
> > dedicated NXP PTN3222.
> >
> > So enable all needed controllers, PHYs and repeaters, while describing
> > their supplies. Also describe the PMIC glink graph for Type-C connectors.
> >
> > Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> > Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/glymur-crd.dts | 283 ++++++++++++++++++++++++++++++++
> > 1 file changed, 283 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > index 7c168e813f1e..3188bfa27bea 100644
> > --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > @@ -56,6 +56,97 @@ key-volume-up {
> > };
> > };
> >
> > + pmic-glink {
> > + compatible = "qcom,glymur-pmic-glink";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
>
> No orientation-gpios?
Nope. Glymur does UCSI 2.x, so orientation comes via UCSI payload.
>
> > +
> > @@ -858,3 +1015,129 @@ &pcie6_port0 {
> > reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
> > wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
> > };
> > +
> > +&usb1_ss0_qmpphy {
> > + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> > + vdda-pll-supply = <&vreg_l3f_e0_0p72>;
> > + refgen-supply = <&vreg_l2f_e0_0p82>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb1_ss0_qmpphy_out {
> > + remote-endpoint = <&pmic_glink_ss_in>;
> > +};
> > +
> > +&usb1_ss0_dwc3_hs {
> > + remote-endpoint = <&pmic_glink_hs_in>;
> > +};
>
> This is obviously not sorted. Please sort the nodes.
Will do.
On Mon, Jan 26, 2026 at 04:24:24PM +0200, Abel Vesa wrote:
> On 26-01-13 20:02:25, Dmitry Baryshkov wrote:
> > On Tue, Jan 13, 2026 at 02:33:06PM +0200, Abel Vesa wrote:
> > > From: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> > >
> > > The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
> > > one USB Type-A, and a fingerprint reader connected over USB. Each of these
> > > 3 Type-C ports are connected to one of the USB combo PHYs and one of the
> > > M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
> > > via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
> > > is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
> > > eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
> > > dedicated NXP PTN3222.
> > >
> > > So enable all needed controllers, PHYs and repeaters, while describing
> > > their supplies. Also describe the PMIC glink graph for Type-C connectors.
> > >
> > > Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
> > > Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > > Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > > ---
> > > arch/arm64/boot/dts/qcom/glymur-crd.dts | 283 ++++++++++++++++++++++++++++++++
> > > 1 file changed, 283 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > > index 7c168e813f1e..3188bfa27bea 100644
> > > --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > > +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > > @@ -56,6 +56,97 @@ key-volume-up {
> > > };
> > > };
> > >
> > > + pmic-glink {
> > > + compatible = "qcom,glymur-pmic-glink";
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> >
> > No orientation-gpios?
>
> Nope. Glymur does UCSI 2.x, so orientation comes via UCSI payload.
But is there a GPIO or not?
>
> >
> > > +
> > > @@ -858,3 +1015,129 @@ &pcie6_port0 {
> > > reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
> > > wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
> > > };
> > > +
> > > +&usb1_ss0_qmpphy {
> > > + vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> > > + vdda-pll-supply = <&vreg_l3f_e0_0p72>;
> > > + refgen-supply = <&vreg_l2f_e0_0p82>;
> > > +
> > > + status = "okay";
> > > +};
> > > +
> > > +&usb1_ss0_qmpphy_out {
> > > + remote-endpoint = <&pmic_glink_ss_in>;
> > > +};
> > > +
> > > +&usb1_ss0_dwc3_hs {
> > > + remote-endpoint = <&pmic_glink_hs_in>;
> > > +};
> >
> > This is obviously not sorted. Please sort the nodes.
>
> Will do.
--
With best wishes
Dmitry
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