From: Sheetal <sheetal@nvidia.com>
Set flat_cache_default_is_zero flag in Tegra audio driver regmap
configurations.
Tegra APE hardware has numerous registers with zero power-on-reset
values. Use flat_cache_default_is_zero to mark cache entries as valid
instead of adding all these registers to reg_defaults arrays.
This patch depends on:
https://patchwork.ozlabs.org/project/linux-tegra/patch/20251217132524.2844499-1-sheetal@nvidia.com/
Signed-off-by: Sheetal <sheetal@nvidia.com>
---
sound/soc/tegra/tegra186_asrc.c | 21 ++++++-----
sound/soc/tegra/tegra186_dspk.c | 21 ++++++-----
sound/soc/tegra/tegra210_admaif.c | 63 ++++++++++++++++---------------
sound/soc/tegra/tegra210_adx.c | 42 +++++++++++----------
sound/soc/tegra/tegra210_ahub.c | 35 +++++++++--------
sound/soc/tegra/tegra210_amx.c | 63 ++++++++++++++++---------------
sound/soc/tegra/tegra210_dmic.c | 21 ++++++-----
sound/soc/tegra/tegra210_i2s.c | 42 +++++++++++----------
sound/soc/tegra/tegra210_mbdrc.c | 25 ++++++------
sound/soc/tegra/tegra210_mixer.c | 23 +++++------
sound/soc/tegra/tegra210_mvc.c | 21 ++++++-----
sound/soc/tegra/tegra210_ope.c | 21 ++++++-----
sound/soc/tegra/tegra210_peq.c | 25 ++++++------
sound/soc/tegra/tegra210_sfc.c | 23 +++++------
14 files changed, 234 insertions(+), 212 deletions(-)
diff --git a/sound/soc/tegra/tegra186_asrc.c b/sound/soc/tegra/tegra186_asrc.c
index 2c0220e14a57..5f95b7cb9421 100644
--- a/sound/soc/tegra/tegra186_asrc.c
+++ b/sound/soc/tegra/tegra186_asrc.c
@@ -941,16 +941,17 @@ static bool tegra186_asrc_volatile_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra186_asrc_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA186_ASRC_CYA,
- .writeable_reg = tegra186_asrc_wr_reg,
- .readable_reg = tegra186_asrc_rd_reg,
- .volatile_reg = tegra186_asrc_volatile_reg,
- .reg_defaults = tegra186_asrc_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra186_asrc_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA186_ASRC_CYA,
+ .writeable_reg = tegra186_asrc_wr_reg,
+ .readable_reg = tegra186_asrc_rd_reg,
+ .volatile_reg = tegra186_asrc_volatile_reg,
+ .reg_defaults = tegra186_asrc_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra186_asrc_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct tegra_asrc_soc_data soc_data_tegra186 = {
diff --git a/sound/soc/tegra/tegra186_dspk.c b/sound/soc/tegra/tegra186_dspk.c
index a762150db802..4183c8fc124f 100644
--- a/sound/soc/tegra/tegra186_dspk.c
+++ b/sound/soc/tegra/tegra186_dspk.c
@@ -458,16 +458,17 @@ static bool tegra186_dspk_volatile_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra186_dspk_regmap = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA186_DSPK_CODEC_CTRL,
- .writeable_reg = tegra186_dspk_wr_reg,
- .readable_reg = tegra186_dspk_rd_reg,
- .volatile_reg = tegra186_dspk_volatile_reg,
- .reg_defaults = tegra186_dspk_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra186_dspk_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA186_DSPK_CODEC_CTRL,
+ .writeable_reg = tegra186_dspk_wr_reg,
+ .readable_reg = tegra186_dspk_rd_reg,
+ .volatile_reg = tegra186_dspk_volatile_reg,
+ .reg_defaults = tegra186_dspk_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra186_dspk_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct of_device_id tegra186_dspk_of_match[] = {
diff --git a/sound/soc/tegra/tegra210_admaif.c b/sound/soc/tegra/tegra210_admaif.c
index f9f6040c4e34..5ecd83517413 100644
--- a/sound/soc/tegra/tegra210_admaif.c
+++ b/sound/soc/tegra/tegra210_admaif.c
@@ -232,42 +232,45 @@ static bool tegra_admaif_volatile_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_admaif_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_ADMAIF_LAST_REG,
- .writeable_reg = tegra_admaif_wr_reg,
- .readable_reg = tegra_admaif_rd_reg,
- .volatile_reg = tegra_admaif_volatile_reg,
- .reg_defaults = tegra210_admaif_reg_defaults,
- .num_reg_defaults = TEGRA210_ADMAIF_CHANNEL_COUNT * 6 + 1,
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_ADMAIF_LAST_REG,
+ .writeable_reg = tegra_admaif_wr_reg,
+ .readable_reg = tegra_admaif_rd_reg,
+ .volatile_reg = tegra_admaif_volatile_reg,
+ .reg_defaults = tegra210_admaif_reg_defaults,
+ .num_reg_defaults = TEGRA210_ADMAIF_CHANNEL_COUNT * 6 + 1,
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct regmap_config tegra186_admaif_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA186_ADMAIF_LAST_REG,
- .writeable_reg = tegra_admaif_wr_reg,
- .readable_reg = tegra_admaif_rd_reg,
- .volatile_reg = tegra_admaif_volatile_reg,
- .reg_defaults = tegra186_admaif_reg_defaults,
- .num_reg_defaults = TEGRA186_ADMAIF_CHANNEL_COUNT * 6 + 1,
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA186_ADMAIF_LAST_REG,
+ .writeable_reg = tegra_admaif_wr_reg,
+ .readable_reg = tegra_admaif_rd_reg,
+ .volatile_reg = tegra_admaif_volatile_reg,
+ .reg_defaults = tegra186_admaif_reg_defaults,
+ .num_reg_defaults = TEGRA186_ADMAIF_CHANNEL_COUNT * 6 + 1,
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct regmap_config tegra264_admaif_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA264_ADMAIF_LAST_REG,
- .writeable_reg = tegra_admaif_wr_reg,
- .readable_reg = tegra_admaif_rd_reg,
- .volatile_reg = tegra_admaif_volatile_reg,
- .reg_defaults = tegra264_admaif_reg_defaults,
- .num_reg_defaults = TEGRA264_ADMAIF_CHANNEL_COUNT * 6 + 1,
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA264_ADMAIF_LAST_REG,
+ .writeable_reg = tegra_admaif_wr_reg,
+ .readable_reg = tegra_admaif_rd_reg,
+ .volatile_reg = tegra_admaif_volatile_reg,
+ .reg_defaults = tegra264_admaif_reg_defaults,
+ .num_reg_defaults = TEGRA264_ADMAIF_CHANNEL_COUNT * 6 + 1,
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static int tegra_admaif_runtime_suspend(struct device *dev)
diff --git a/sound/soc/tegra/tegra210_adx.c b/sound/soc/tegra/tegra210_adx.c
index 6c9a410085bc..de7f64bd5d75 100644
--- a/sound/soc/tegra/tegra210_adx.c
+++ b/sound/soc/tegra/tegra210_adx.c
@@ -616,29 +616,31 @@ static bool tegra264_adx_volatile_reg(struct device *dev,
}
static const struct regmap_config tegra210_adx_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_ADX_CFG_RAM_DATA,
- .writeable_reg = tegra210_adx_wr_reg,
- .readable_reg = tegra210_adx_rd_reg,
- .volatile_reg = tegra210_adx_volatile_reg,
- .reg_defaults = tegra210_adx_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_adx_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_ADX_CFG_RAM_DATA,
+ .writeable_reg = tegra210_adx_wr_reg,
+ .readable_reg = tegra210_adx_rd_reg,
+ .volatile_reg = tegra210_adx_volatile_reg,
+ .reg_defaults = tegra210_adx_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_adx_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct regmap_config tegra264_adx_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA264_ADX_CFG_RAM_DATA,
- .writeable_reg = tegra264_adx_wr_reg,
- .readable_reg = tegra264_adx_rd_reg,
- .volatile_reg = tegra264_adx_volatile_reg,
- .reg_defaults = tegra264_adx_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra264_adx_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA264_ADX_CFG_RAM_DATA,
+ .writeable_reg = tegra264_adx_wr_reg,
+ .readable_reg = tegra264_adx_rd_reg,
+ .volatile_reg = tegra264_adx_volatile_reg,
+ .reg_defaults = tegra264_adx_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra264_adx_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct tegra210_adx_soc_data soc_data_tegra210 = {
diff --git a/sound/soc/tegra/tegra210_ahub.c b/sound/soc/tegra/tegra210_ahub.c
index e795907a3963..e67850dac18d 100644
--- a/sound/soc/tegra/tegra210_ahub.c
+++ b/sound/soc/tegra/tegra210_ahub.c
@@ -2073,28 +2073,31 @@ static bool tegra264_ahub_wr_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_ahub_regmap_config = {
- .reg_bits = 32,
- .val_bits = 32,
- .reg_stride = 4,
- .max_register = TEGRA210_MAX_REGISTER_ADDR,
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .max_register = TEGRA210_MAX_REGISTER_ADDR,
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct regmap_config tegra186_ahub_regmap_config = {
- .reg_bits = 32,
- .val_bits = 32,
- .reg_stride = 4,
- .max_register = TEGRA186_MAX_REGISTER_ADDR,
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .max_register = TEGRA186_MAX_REGISTER_ADDR,
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct regmap_config tegra264_ahub_regmap_config = {
- .reg_bits = 32,
- .val_bits = 32,
- .reg_stride = 4,
- .writeable_reg = tegra264_ahub_wr_reg,
- .max_register = TEGRA264_MAX_REGISTER_ADDR,
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .writeable_reg = tegra264_ahub_wr_reg,
+ .max_register = TEGRA264_MAX_REGISTER_ADDR,
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct tegra_ahub_soc_data soc_data_tegra210 = {
diff --git a/sound/soc/tegra/tegra210_amx.c b/sound/soc/tegra/tegra210_amx.c
index c94f8c84e04f..1a7943bb41cc 100644
--- a/sound/soc/tegra/tegra210_amx.c
+++ b/sound/soc/tegra/tegra210_amx.c
@@ -645,42 +645,45 @@ static bool tegra264_amx_volatile_reg(struct device *dev,
}
static const struct regmap_config tegra210_amx_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_AMX_CFG_RAM_DATA,
- .writeable_reg = tegra210_amx_wr_reg,
- .readable_reg = tegra210_amx_rd_reg,
- .volatile_reg = tegra210_amx_volatile_reg,
- .reg_defaults = tegra210_amx_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_amx_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_AMX_CFG_RAM_DATA,
+ .writeable_reg = tegra210_amx_wr_reg,
+ .readable_reg = tegra210_amx_rd_reg,
+ .volatile_reg = tegra210_amx_volatile_reg,
+ .reg_defaults = tegra210_amx_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_amx_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct regmap_config tegra194_amx_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA194_AMX_RX4_LAST_FRAME_PERIOD,
- .writeable_reg = tegra194_amx_wr_reg,
- .readable_reg = tegra194_amx_rd_reg,
- .volatile_reg = tegra210_amx_volatile_reg,
- .reg_defaults = tegra210_amx_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_amx_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA194_AMX_RX4_LAST_FRAME_PERIOD,
+ .writeable_reg = tegra194_amx_wr_reg,
+ .readable_reg = tegra194_amx_rd_reg,
+ .volatile_reg = tegra210_amx_volatile_reg,
+ .reg_defaults = tegra210_amx_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_amx_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct regmap_config tegra264_amx_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA264_AMX_RX4_LAST_FRAME_PERIOD,
- .writeable_reg = tegra264_amx_wr_reg,
- .readable_reg = tegra264_amx_rd_reg,
- .volatile_reg = tegra264_amx_volatile_reg,
- .reg_defaults = tegra264_amx_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra264_amx_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA264_AMX_RX4_LAST_FRAME_PERIOD,
+ .writeable_reg = tegra264_amx_wr_reg,
+ .readable_reg = tegra264_amx_rd_reg,
+ .volatile_reg = tegra264_amx_volatile_reg,
+ .reg_defaults = tegra264_amx_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra264_amx_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct tegra210_amx_soc_data soc_data_tegra210 = {
diff --git a/sound/soc/tegra/tegra210_dmic.c b/sound/soc/tegra/tegra210_dmic.c
index 66fff53aeaa6..71b46a86443e 100644
--- a/sound/soc/tegra/tegra210_dmic.c
+++ b/sound/soc/tegra/tegra210_dmic.c
@@ -474,16 +474,17 @@ static bool tegra210_dmic_volatile_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_dmic_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_DMIC_LP_BIQUAD_1_COEF_4,
- .writeable_reg = tegra210_dmic_wr_reg,
- .readable_reg = tegra210_dmic_rd_reg,
- .volatile_reg = tegra210_dmic_volatile_reg,
- .reg_defaults = tegra210_dmic_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_DMIC_LP_BIQUAD_1_COEF_4,
+ .writeable_reg = tegra210_dmic_wr_reg,
+ .readable_reg = tegra210_dmic_rd_reg,
+ .volatile_reg = tegra210_dmic_volatile_reg,
+ .reg_defaults = tegra210_dmic_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static int tegra210_dmic_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra210_i2s.c b/sound/soc/tegra/tegra210_i2s.c
index b91e0e6cd7fe..940d9f6bdc3f 100644
--- a/sound/soc/tegra/tegra210_i2s.c
+++ b/sound/soc/tegra/tegra210_i2s.c
@@ -988,16 +988,17 @@ static bool tegra264_i2s_volatile_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_regmap_conf = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_I2S_CYA,
- .writeable_reg = tegra210_i2s_wr_reg,
- .readable_reg = tegra210_i2s_rd_reg,
- .volatile_reg = tegra210_i2s_volatile_reg,
- .reg_defaults = tegra210_i2s_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_i2s_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_I2S_CYA,
+ .writeable_reg = tegra210_i2s_wr_reg,
+ .readable_reg = tegra210_i2s_rd_reg,
+ .volatile_reg = tegra210_i2s_volatile_reg,
+ .reg_defaults = tegra210_i2s_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_i2s_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
/*
@@ -1035,16 +1036,17 @@ static void tegra210_parse_client_convert(struct device *dev)
}
static const struct regmap_config tegra264_regmap_conf = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA264_I2S_PAD_MACRO_STATUS,
- .writeable_reg = tegra264_i2s_wr_reg,
- .readable_reg = tegra264_i2s_rd_reg,
- .volatile_reg = tegra264_i2s_volatile_reg,
- .reg_defaults = tegra264_i2s_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra264_i2s_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA264_I2S_PAD_MACRO_STATUS,
+ .writeable_reg = tegra264_i2s_wr_reg,
+ .readable_reg = tegra264_i2s_rd_reg,
+ .volatile_reg = tegra264_i2s_volatile_reg,
+ .reg_defaults = tegra264_i2s_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra264_i2s_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static int tegra210_i2s_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra210_mbdrc.c b/sound/soc/tegra/tegra210_mbdrc.c
index 09fe3c5cf540..485fae392741 100644
--- a/sound/soc/tegra/tegra210_mbdrc.c
+++ b/sound/soc/tegra/tegra210_mbdrc.c
@@ -752,18 +752,19 @@ static bool tegra210_mbdrc_precious_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_mbdrc_regmap_cfg = {
- .name = "mbdrc",
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_MBDRC_MAX_REG,
- .writeable_reg = tegra210_mbdrc_wr_reg,
- .readable_reg = tegra210_mbdrc_rd_reg,
- .volatile_reg = tegra210_mbdrc_volatile_reg,
- .precious_reg = tegra210_mbdrc_precious_reg,
- .reg_defaults = tegra210_mbdrc_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_mbdrc_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .name = "mbdrc",
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_MBDRC_MAX_REG,
+ .writeable_reg = tegra210_mbdrc_wr_reg,
+ .readable_reg = tegra210_mbdrc_rd_reg,
+ .volatile_reg = tegra210_mbdrc_volatile_reg,
+ .precious_reg = tegra210_mbdrc_precious_reg,
+ .reg_defaults = tegra210_mbdrc_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_mbdrc_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
int tegra210_mbdrc_hw_params(struct snd_soc_component *cmpnt)
diff --git a/sound/soc/tegra/tegra210_mixer.c b/sound/soc/tegra/tegra210_mixer.c
index ff8e9f2d7abf..b05d1140c689 100644
--- a/sound/soc/tegra/tegra210_mixer.c
+++ b/sound/soc/tegra/tegra210_mixer.c
@@ -598,17 +598,18 @@ static bool tegra210_mixer_precious_reg(struct device *dev,
}
static const struct regmap_config tegra210_mixer_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_MIXER_CTRL,
- .writeable_reg = tegra210_mixer_wr_reg,
- .readable_reg = tegra210_mixer_rd_reg,
- .volatile_reg = tegra210_mixer_volatile_reg,
- .precious_reg = tegra210_mixer_precious_reg,
- .reg_defaults = tegra210_mixer_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_mixer_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_MIXER_CTRL,
+ .writeable_reg = tegra210_mixer_wr_reg,
+ .readable_reg = tegra210_mixer_rd_reg,
+ .volatile_reg = tegra210_mixer_volatile_reg,
+ .precious_reg = tegra210_mixer_precious_reg,
+ .reg_defaults = tegra210_mixer_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_mixer_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct of_device_id tegra210_mixer_of_match[] = {
diff --git a/sound/soc/tegra/tegra210_mvc.c b/sound/soc/tegra/tegra210_mvc.c
index 779d4c199da9..a0699563a512 100644
--- a/sound/soc/tegra/tegra210_mvc.c
+++ b/sound/soc/tegra/tegra210_mvc.c
@@ -690,16 +690,17 @@ static bool tegra210_mvc_volatile_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_mvc_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_MVC_CONFIG_ERR_TYPE,
- .writeable_reg = tegra210_mvc_wr_reg,
- .readable_reg = tegra210_mvc_rd_reg,
- .volatile_reg = tegra210_mvc_volatile_reg,
- .reg_defaults = tegra210_mvc_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_mvc_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_MVC_CONFIG_ERR_TYPE,
+ .writeable_reg = tegra210_mvc_wr_reg,
+ .readable_reg = tegra210_mvc_rd_reg,
+ .volatile_reg = tegra210_mvc_volatile_reg,
+ .reg_defaults = tegra210_mvc_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_mvc_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct of_device_id tegra210_mvc_of_match[] = {
diff --git a/sound/soc/tegra/tegra210_ope.c b/sound/soc/tegra/tegra210_ope.c
index 27db70af2746..6a1c05829b4b 100644
--- a/sound/soc/tegra/tegra210_ope.c
+++ b/sound/soc/tegra/tegra210_ope.c
@@ -288,16 +288,17 @@ static bool tegra210_ope_volatile_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_ope_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_OPE_DIR,
- .writeable_reg = tegra210_ope_wr_reg,
- .readable_reg = tegra210_ope_rd_reg,
- .volatile_reg = tegra210_ope_volatile_reg,
- .reg_defaults = tegra210_ope_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_ope_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_OPE_DIR,
+ .writeable_reg = tegra210_ope_wr_reg,
+ .readable_reg = tegra210_ope_rd_reg,
+ .volatile_reg = tegra210_ope_volatile_reg,
+ .reg_defaults = tegra210_ope_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_ope_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static int tegra210_ope_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra210_peq.c b/sound/soc/tegra/tegra210_peq.c
index 9a05e6913276..0f90a9d27f2e 100644
--- a/sound/soc/tegra/tegra210_peq.c
+++ b/sound/soc/tegra/tegra210_peq.c
@@ -295,18 +295,19 @@ static bool tegra210_peq_precious_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_peq_regmap_config = {
- .name = "peq",
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_PEQ_CFG_RAM_SHIFT_DATA,
- .writeable_reg = tegra210_peq_wr_reg,
- .readable_reg = tegra210_peq_rd_reg,
- .volatile_reg = tegra210_peq_volatile_reg,
- .precious_reg = tegra210_peq_precious_reg,
- .reg_defaults = tegra210_peq_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_peq_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .name = "peq",
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_PEQ_CFG_RAM_SHIFT_DATA,
+ .writeable_reg = tegra210_peq_wr_reg,
+ .readable_reg = tegra210_peq_rd_reg,
+ .volatile_reg = tegra210_peq_volatile_reg,
+ .precious_reg = tegra210_peq_precious_reg,
+ .reg_defaults = tegra210_peq_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_peq_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
void tegra210_peq_restore(struct regmap *regmap, u32 *biquad_gains,
diff --git a/sound/soc/tegra/tegra210_sfc.c b/sound/soc/tegra/tegra210_sfc.c
index d6341968bebe..4aee0a86c5dc 100644
--- a/sound/soc/tegra/tegra210_sfc.c
+++ b/sound/soc/tegra/tegra210_sfc.c
@@ -3559,17 +3559,18 @@ static bool tegra210_sfc_precious_reg(struct device *dev, unsigned int reg)
}
static const struct regmap_config tegra210_sfc_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = TEGRA210_SFC_CFG_RAM_DATA,
- .writeable_reg = tegra210_sfc_wr_reg,
- .readable_reg = tegra210_sfc_rd_reg,
- .volatile_reg = tegra210_sfc_volatile_reg,
- .precious_reg = tegra210_sfc_precious_reg,
- .reg_defaults = tegra210_sfc_reg_defaults,
- .num_reg_defaults = ARRAY_SIZE(tegra210_sfc_reg_defaults),
- .cache_type = REGCACHE_FLAT,
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = TEGRA210_SFC_CFG_RAM_DATA,
+ .writeable_reg = tegra210_sfc_wr_reg,
+ .readable_reg = tegra210_sfc_rd_reg,
+ .volatile_reg = tegra210_sfc_volatile_reg,
+ .precious_reg = tegra210_sfc_precious_reg,
+ .reg_defaults = tegra210_sfc_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tegra210_sfc_reg_defaults),
+ .cache_type = REGCACHE_FLAT,
+ .flat_cache_default_is_zero = true,
};
static const struct of_device_id tegra210_sfc_of_match[] = {
--
2.17.1On Mon, Jan 12, 2026 at 09:58:41AM +0530, Sheetal . wrote: > From: Sheetal <sheetal@nvidia.com> > > Set flat_cache_default_is_zero flag in Tegra audio driver regmap > configurations. This doesn't apply against current code, please check and resend.
On 12-01-2026 17:56, Mark Brown wrote: > On Mon, Jan 12, 2026 at 09:58:41AM +0530, Sheetal . wrote: >> From: Sheetal <sheetal@nvidia.com> >> >> Set flat_cache_default_is_zero flag in Tegra audio driver regmap >> configurations. > > This doesn't apply against current code, please check and resend. As mentioned in the commit message, This patch depends on: https://patchwork.ozlabs.org/project/linux-tegra/patch/20251217132524.2844499-1-sheetal@nvidia.com/. Kindly let me know if any additional action is required on my part. Regards, Sheetal
On Mon, Jan 12, 2026 at 06:23:39PM +0530, Sheetal . wrote: > On 12-01-2026 17:56, Mark Brown wrote: > > This doesn't apply against current code, please check and resend. > As mentioned in the commit message, > This patch depends on: > https://patchwork.ozlabs.org/project/linux-tegra/patch/20251217132524.2844499-1-sheetal@nvidia.com/. Please include human readable descriptions of things like commits and issues being discussed in e-mail in your mails, this makes them much easier for humans to read especially when they have no internet access. I do frequently catch up on my mail on flights or while otherwise travelling so this is even more pressing for me than just being about making things a bit easier to read. > Kindly let me know if any additional action is required on my part. Please resend when the dependencies are lined up.
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