From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
controller chips, supporting USB2.0 high-speed and full-speed for
upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
mode (single TT schedules 4 downstream ports in time share), but also
supports high performance MTT mode (4 TTs each corresponding to 1 port,
concurrent processing).
Add a device tree binding for it.
[0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
.../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
1 file changed, 65 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
new file mode 100644
index 000000000000..2eeb92f25b4c
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: WCH CH334/CH335 USB 2.0 Hub Controller
+
+maintainers:
+ - Chaoyi Chen <kernel@airkyi.com>
+
+allOf:
+ - $ref: usb-hub.yaml#
+
+properties:
+ compatible:
+ enum:
+ - usb1a86,8091
+
+ reg: true
+
+ reset-gpios:
+ description: GPIO controlling the RESET# pin.
+
+ vdd-supply:
+ description:
+ The regulator that provides 3.3V core power to the hub.
+
+ vdd2-supply:
+ description:
+ The regulator that provides 3.3V or 5V power to the hub.
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ patternProperties:
+ '^port@':
+ $ref: /schemas/graph.yaml#/properties/port
+
+ properties:
+ reg:
+ minimum: 1
+ maximum: 4
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ usb {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub: hub@1 {
+ compatible = "usb1a86,8091";
+ reg = <1>;
+ reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+ vdd-supply = <&vcc_3v3>;
+ };
+ };
--
2.51.1Hi Chaoyi, On 1/12/26 3:28 AM, Chaoyi Chen wrote: > From: Chaoyi Chen <chaoyi.chen@rock-chips.com> > > The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB > controller chips, supporting USB2.0 high-speed and full-speed for > upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and > low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT > mode (single TT schedules 4 downstream ports in time share), but also > supports high performance MTT mode (4 TTs each corresponding to 1 port, > concurrent processing). > > Add a device tree binding for it. > > [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html > > Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com> > --- > .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++ > 1 file changed, 65 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml > > diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml > new file mode 100644 > index 000000000000..2eeb92f25b4c > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml > @@ -0,0 +1,65 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: WCH CH334/CH335 USB 2.0 Hub Controller > + > +maintainers: > + - Chaoyi Chen <kernel@airkyi.com> > + > +allOf: > + - $ref: usb-hub.yaml# > + > +properties: > + compatible: > + enum: > + - usb1a86,8091 > + Which driver does this node bind to? I couldn't quickly find a driver which would match this compatible? > + reg: true > + > + reset-gpios: > + description: GPIO controlling the RESET# pin. > + > + vdd-supply: > + description: > + The regulator that provides 3.3V core power to the hub. > + > + vdd2-supply: > + description: > + The regulator that provides 3.3V or 5V power to the hub. > + There's v5 and vdd33 as power input, shouldn't we maybe use those names instead? How did you come up with vdd/vdd2? There's also a timing that needs to be respected after a power-on event so that the reset has enough time to be performed, c.f. 3.2.1 Power-on Reset in the datasheet you linked to in the commit log. How are you making sure we wait those (apparently, the wording in the datasheet is confusing) 14ms? Cheers, Quentin
Hi Quentin, On 1/12/2026 10:00 PM, Quentin Schulz wrote: > Hi Chaoyi, > > On 1/12/26 3:28 AM, Chaoyi Chen wrote: >> From: Chaoyi Chen <chaoyi.chen@rock-chips.com> >> >> The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB >> controller chips, supporting USB2.0 high-speed and full-speed for >> upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and >> low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT >> mode (single TT schedules 4 downstream ports in time share), but also >> supports high performance MTT mode (4 TTs each corresponding to 1 port, >> concurrent processing). >> >> Add a device tree binding for it. >> >> [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html >> >> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com> >> --- >> .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++ >> 1 file changed, 65 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml >> >> diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml >> new file mode 100644 >> index 000000000000..2eeb92f25b4c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml >> @@ -0,0 +1,65 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: WCH CH334/CH335 USB 2.0 Hub Controller >> + >> +maintainers: >> + - Chaoyi Chen <kernel@airkyi.com> >> + >> +allOf: >> + - $ref: usb-hub.yaml# >> + >> +properties: >> + compatible: >> + enum: >> + - usb1a86,8091 >> + > > Which driver does this node bind to? I couldn't quickly find a driver which would match this compatible? > Oh, I missed that part. It will be fixed in the next version. >> + reg: true >> + >> + reset-gpios: >> + description: GPIO controlling the RESET# pin. >> + >> + vdd-supply: >> + description: >> + The regulator that provides 3.3V core power to the hub. >> + >> + vdd2-supply: >> + description: >> + The regulator that provides 3.3V or 5V power to the hub. >> + > > There's v5 and vdd33 as power input, shouldn't we maybe use those names instead? How did you come up with vdd/vdd2? > That make sense. Will fix in next version. > There's also a timing that needs to be respected after a power-on event so that the reset has enough time to be performed, c.f. 3.2.1 Power-on Reset in the datasheet you linked to in the commit log. How are you making sure we wait those (apparently, the wording in the datasheet is confusing) 14ms? This part should be described in the driver. I'll fix it in the next version. -- Best, Chaoyi
On Mon, Jan 12, 2026 at 10:28:21AM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>
> The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
> controller chips, supporting USB2.0 high-speed and full-speed for
> upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
> low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
> mode (single TT schedules 4 downstream ports in time share), but also
> supports high performance MTT mode (4 TTs each corresponding to 1 port,
> concurrent processing).
>
> Add a device tree binding for it.
>
> [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
>
> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> ---
> .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
This must be separate patch. Do not combine independent subsystems into
one patchset.
> 1 file changed, 65 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
> new file mode 100644
> index 000000000000..2eeb92f25b4c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: WCH CH334/CH335 USB 2.0 Hub Controller
> +
> +maintainers:
> + - Chaoyi Chen <kernel@airkyi.com>
> +
> +allOf:
> + - $ref: usb-hub.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - usb1a86,8091
> +
> + reg: true
> +
> + reset-gpios:
> + description: GPIO controlling the RESET# pin.
> +
> + vdd-supply:
> + description:
> + The regulator that provides 3.3V core power to the hub.
> +
> + vdd2-supply:
> + description:
> + The regulator that provides 3.3V or 5V power to the hub.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + patternProperties:
> + '^port@':
> + $ref: /schemas/graph.yaml#/properties/port
> +
> + properties:
> + reg:
> + minimum: 1
> + maximum: 4
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> + usb {
> + dr_mode = "host";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + hub: hub@1 {
> + compatible = "usb1a86,8091";
> + reg = <1>;
> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
Are you sure?
Best regards,
Krzysztof
Hi Krzysztof,
On 1/12/2026 4:50 PM, Krzysztof Kozlowski wrote:
> On Mon, Jan 12, 2026 at 10:28:21AM +0800, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>>
>> The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
>> controller chips, supporting USB2.0 high-speed and full-speed for
>> upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
>> low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
>> mode (single TT schedules 4 downstream ports in time share), but also
>> supports high performance MTT mode (4 TTs each corresponding to 1 port,
>> concurrent processing).
>>
>> Add a device tree binding for it.
>>
>> [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
>>
>> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>> ---
>> .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
>
> This must be separate patch. Do not combine independent subsystems into
> one patchset.
>
Okay, thank you for the reminder.
>> 1 file changed, 65 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
>> new file mode 100644
>> index 000000000000..2eeb92f25b4c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
>> @@ -0,0 +1,65 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: WCH CH334/CH335 USB 2.0 Hub Controller
>> +
>> +maintainers:
>> + - Chaoyi Chen <kernel@airkyi.com>
>> +
>> +allOf:
>> + - $ref: usb-hub.yaml#
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - usb1a86,8091
>> +
>> + reg: true
>> +
>> + reset-gpios:
>> + description: GPIO controlling the RESET# pin.
>> +
>> + vdd-supply:
>> + description:
>> + The regulator that provides 3.3V core power to the hub.
>> +
>> + vdd2-supply:
>> + description:
>> + The regulator that provides 3.3V or 5V power to the hub.
>> +
>> + ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>> +
>> + patternProperties:
>> + '^port@':
>> + $ref: /schemas/graph.yaml#/properties/port
>> +
>> + properties:
>> + reg:
>> + minimum: 1
>> + maximum: 4
>> +
>> +required:
>> + - compatible
>> + - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/gpio/gpio.h>
>> + usb {
>> + dr_mode = "host";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + hub: hub@1 {
>> + compatible = "usb1a86,8091";
>> + reg = <1>;
>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>
> Are you sure?
I guess what you're concerned about here is the polarity?
If that's the case, then there's no problem.
--
Best,
Chaoyi
On 12/01/2026 09:59, Chaoyi Chen wrote:
>>> +required:
>>> + - compatible
>>> + - reg
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> + - |
>>> + #include <dt-bindings/gpio/gpio.h>
>>> + usb {
>>> + dr_mode = "host";
One more thing - drop above line.
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + hub: hub@1 {
>>> + compatible = "usb1a86,8091";
>>> + reg = <1>;
>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>
>> Are you sure?
>
> I guess what you're concerned about here is the polarity?
> If that's the case, then there's no problem.
Yes, I was wondering whether polarity is set correctly.
Best regards,
Krzysztof
Hi Krzysztof,
On 1/12/2026 10:28 PM, Krzysztof Kozlowski wrote:
> On 12/01/2026 09:59, Chaoyi Chen wrote:
>>>> +required:
>>>> + - compatible
>>>> + - reg
>>>> +
>>>> +additionalProperties: false
>>>> +
>>>> +examples:
>>>> + - |
>>>> + #include <dt-bindings/gpio/gpio.h>
>>>> + usb {
>>>> + dr_mode = "host";
>
> One more thing - drop above line.
>
Will fix in next version.
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> +
>>>> + hub: hub@1 {
>>>> + compatible = "usb1a86,8091";
>>>> + reg = <1>;
>>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>>
>>> Are you sure?
>>
>> I guess what you're concerned about here is the polarity?
>> If that's the case, then there's no problem.
>
> Yes, I was wondering whether polarity is set correctly.
Yes, it is active-low, so during normal operation it should be set to high.
--
Best,
Chaoyi
On 13/01/2026 04:27, Chaoyi Chen wrote:
> Hi Krzysztof,
>
> On 1/12/2026 10:28 PM, Krzysztof Kozlowski wrote:
>> On 12/01/2026 09:59, Chaoyi Chen wrote:
>>>>> +required:
>>>>> + - compatible
>>>>> + - reg
>>>>> +
>>>>> +additionalProperties: false
>>>>> +
>>>>> +examples:
>>>>> + - |
>>>>> + #include <dt-bindings/gpio/gpio.h>
>>>>> + usb {
>>>>> + dr_mode = "host";
>>
>> One more thing - drop above line.
>>
>
> Will fix in next version.
>
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> +
>>>>> + hub: hub@1 {
>>>>> + compatible = "usb1a86,8091";
>>>>> + reg = <1>;
>>>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>>>
>>>> Are you sure?
>>>
>>> I guess what you're concerned about here is the polarity?
>>> If that's the case, then there's no problem.
>>
>> Yes, I was wondering whether polarity is set correctly.
>
> Yes, it is active-low, so during normal operation it should be set to high.
Then it is wrong.
>
Best regards,
Krzysztof
On 1/13/2026 11:27 AM, Chaoyi Chen wrote:
> Hi Krzysztof,
>
> On 1/12/2026 10:28 PM, Krzysztof Kozlowski wrote:
>> On 12/01/2026 09:59, Chaoyi Chen wrote:
>>>>> +required:
>>>>> + - compatible
>>>>> + - reg
>>>>> +
>>>>> +additionalProperties: false
>>>>> +
>>>>> +examples:
>>>>> + - |
>>>>> + #include <dt-bindings/gpio/gpio.h>
>>>>> + usb {
>>>>> + dr_mode = "host";
>>
>> One more thing - drop above line.
>>
>
> Will fix in next version.
>
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> +
>>>>> + hub: hub@1 {
>>>>> + compatible = "usb1a86,8091";
>>>>> + reg = <1>;
>>>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>>>
>>>> Are you sure?
>>>
>>> I guess what you're concerned about here is the polarity?
>>> If that's the case, then there's no problem.
>>
>> Yes, I was wondering whether polarity is set correctly.
>
> Yes, it is active-low, so during normal operation it should be set to high.
>
Sorry, I didn't consider the driver situation.
I will fix it in the next version.
--
Best,
Chaoyi
© 2016 - 2026 Red Hat, Inc.