Add dt schema documentation and clock IDs for the Display Process Unit
(DPU) clock management unit (CMU). This CMU feeds IPs such as image scaler,
enhancer and compressor.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
Changes in v2
- alphanumeric placement (Krzysztof)
---
.../bindings/clock/google,gs101-clock.yaml | 19 ++++++++++++
include/dt-bindings/clock/google,gs101.h | 36 ++++++++++++++++++++++
2 files changed, 55 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
index a8176687bb773ae90800b9c256bcccebfdef2e49..00620ab1872db0489dce1823ab500c0062b651f0 100644
--- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
@@ -28,6 +28,7 @@ properties:
compatible:
enum:
- google,gs101-cmu-apm
+ - google,gs101-cmu-dpu
- google,gs101-cmu-hsi0
- google,gs101-cmu-hsi2
- google,gs101-cmu-misc
@@ -82,6 +83,24 @@ allOf:
items:
- const: oscclk
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: google,gs101-cmu-dpu
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (24.576 MHz)
+ - description: DPU bus clock (from CMU_TOP)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: bus
+
- if:
properties:
compatible:
diff --git a/include/dt-bindings/clock/google,gs101.h b/include/dt-bindings/clock/google,gs101.h
index 442f9e9037dc33198a1cee20af62fc70bbd96605..4ee46503663c1f8d9463536c347de5d991474145 100644
--- a/include/dt-bindings/clock/google,gs101.h
+++ b/include/dt-bindings/clock/google,gs101.h
@@ -634,4 +634,40 @@
#define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK 45
#define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK 46
+/* CMU_DPU */
+#define CLK_MOUT_DPU_BUS_USER 1
+#define CLK_DOUT_DPU_BUSP 2
+#define CLK_GOUT_DPU_PCLK 3
+#define CLK_GOUT_DPU_CLK_DPU_OSCCLK_CLK 4
+#define CLK_GOUT_DPU_AD_APB_DPU_DMA_PCLKM 5
+#define CLK_GOUT_DPU_DPUF_ACLK_DMA 6
+#define CLK_GOUT_DPU_DPUF_ACLK_DPP 7
+#define CLK_GOUT_DPU_D_TZPC_DPU_PCLK 8
+#define CLK_GOUT_DPU_GPC_DPU_PCLK 9
+#define CLK_GOUT_DPU_LHM_AXI_P_DPU_I_CLK 10
+#define CLK_GOUT_DPU_LHS_AXI_D0_DPU_I_CLK 11
+#define CLK_GOUT_DPU_LHS_AXI_D1_DPU_I_CLK 12
+#define CLK_GOUT_DPU_LHS_AXI_D2_DPU_I_CLK 13
+#define CLK_GOUT_DPU_PPMU_DPUD0_ACLK 14
+#define CLK_GOUT_DPU_PPMU_DPUD0_PCLK 15
+#define CLK_GOUT_DPU_PPMU_DPUD1_ACLK 16
+#define CLK_GOUT_DPU_PPMU_DPUD1_PCLK 17
+#define CLK_GOUT_DPU_PPMU_DPUD2_ACLK 18
+#define CLK_GOUT_DPU_PPMU_DPUD2_PCLK 19
+#define CLK_GOUT_DPU_CLK_DPU_BUSD_CLK 20
+#define CLK_GOUT_DPU_CLK_DPU_BUSP_CLK 21
+#define CLK_GOUT_DPU_SSMT_DPU0_ACLK 22
+#define CLK_GOUT_DPU_SSMT_DPU0_PCLK 23
+#define CLK_GOUT_DPU_SSMT_DPU1_ACLK 24
+#define CLK_GOUT_DPU_SSMT_DPU1_PCLK 25
+#define CLK_GOUT_DPU_SSMT_DPU2_ACLK 26
+#define CLK_GOUT_DPU_SSMT_DPU2_PCLK 27
+#define CLK_GOUT_DPU_SYSMMU_DPUD0_CLK_S1 28
+#define CLK_GOUT_DPU_SYSMMU_DPUD0_CLK_S2 29
+#define CLK_GOUT_DPU_SYSMMU_DPUD1_CLK_S1 30
+#define CLK_GOUT_DPU_SYSMMU_DPUD1_CLK_S2 31
+#define CLK_GOUT_DPU_SYSMMU_DPUD2_CLK_S1 32
+#define CLK_GOUT_DPU_SYSMMU_DPUD2_CLK_S2 33
+#define CLK_GOUT_DPU_SYSREG_DPU_PCLK 34
+
#endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_H */
--
2.52.0.457.g6b5491de43-goog
On Mon, 2026-01-12 at 14:16 +0000, Peter Griffin wrote: > Add dt schema documentation and clock IDs for the Display Process Unit > (DPU) clock management unit (CMU). This CMU feeds IPs such as image scaler, > enhancer and compressor. > > Signed-off-by: Peter Griffin <peter.griffin@linaro.org> > --- > Changes in v2 > - alphanumeric placement (Krzysztof) > --- > .../bindings/clock/google,gs101-clock.yaml | 19 ++++++++++++ > include/dt-bindings/clock/google,gs101.h | 36 ++++++++++++++++++++++ > 2 files changed, 55 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101- > clock.yaml > index a8176687bb773ae90800b9c256bcccebfdef2e49..00620ab1872db0489dce1823ab500c0062b651f0 100644 > --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml > @@ -28,6 +28,7 @@ properties: > compatible: > enum: > - google,gs101-cmu-apm > + - google,gs101-cmu-dpu > - google,gs101-cmu-hsi0 > - google,gs101-cmu-hsi2 > - google,gs101-cmu-misc > @@ -82,6 +83,24 @@ allOf: > items: > - const: oscclk > > + - if: > + properties: > + compatible: > + contains: > + const: google,gs101-cmu-dpu > + > + then: > + properties: > + clocks: > + items: > + - description: External reference clock (24.576 MHz) > + - description: DPU bus clock (from CMU_TOP) > + > + clock-names: > + items: > + - const: oscclk > + - const: bus > + > - if: > properties: > compatible: > diff --git a/include/dt-bindings/clock/google,gs101.h b/include/dt-bindings/clock/google,gs101.h > index 442f9e9037dc33198a1cee20af62fc70bbd96605..4ee46503663c1f8d9463536c347de5d991474145 100644 > --- a/include/dt-bindings/clock/google,gs101.h > +++ b/include/dt-bindings/clock/google,gs101.h > @@ -634,4 +634,40 @@ > #define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK 45 > #define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK 46 > > +/* CMU_DPU */ Maybe add this block before hsi0 and after apm to keep alphabetic ordering of CMU blocks in this file. Cheers, Andre'
Hi André, On Mon, 12 Jan 2026 at 14:32, André Draszik <andre.draszik@linaro.org> wrote: > > On Mon, 2026-01-12 at 14:16 +0000, Peter Griffin wrote: > > Add dt schema documentation and clock IDs for the Display Process Unit > > (DPU) clock management unit (CMU). This CMU feeds IPs such as image scaler, > > enhancer and compressor. > > > > Signed-off-by: Peter Griffin <peter.griffin@linaro.org> > > --- > > Changes in v2 > > - alphanumeric placement (Krzysztof) > > --- > > .../bindings/clock/google,gs101-clock.yaml | 19 ++++++++++++ > > include/dt-bindings/clock/google,gs101.h | 36 ++++++++++++++++++++++ > > 2 files changed, 55 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101- > > clock.yaml > > index a8176687bb773ae90800b9c256bcccebfdef2e49..00620ab1872db0489dce1823ab500c0062b651f0 100644 > > --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml > > +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml > > @@ -28,6 +28,7 @@ properties: > > compatible: > > enum: > > - google,gs101-cmu-apm > > + - google,gs101-cmu-dpu > > - google,gs101-cmu-hsi0 > > - google,gs101-cmu-hsi2 > > - google,gs101-cmu-misc > > @@ -82,6 +83,24 @@ allOf: > > items: > > - const: oscclk > > > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: google,gs101-cmu-dpu > > + > > + then: > > + properties: > > + clocks: > > + items: > > + - description: External reference clock (24.576 MHz) > > + - description: DPU bus clock (from CMU_TOP) > > + > > + clock-names: > > + items: > > + - const: oscclk > > + - const: bus > > + > > - if: > > properties: > > compatible: > > diff --git a/include/dt-bindings/clock/google,gs101.h b/include/dt-bindings/clock/google,gs101.h > > index 442f9e9037dc33198a1cee20af62fc70bbd96605..4ee46503663c1f8d9463536c347de5d991474145 100644 > > --- a/include/dt-bindings/clock/google,gs101.h > > +++ b/include/dt-bindings/clock/google,gs101.h > > @@ -634,4 +634,40 @@ > > #define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK 45 > > #define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK 46 > > > > +/* CMU_DPU */ > > Maybe add this block before hsi0 and after apm to keep alphabetic ordering > of CMU blocks in this file. Thanks for the review. Good point, I'll fix that and send a v3. Peter
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