MDSS and GPU drivers use different approaches to get min_acc length.
Add helper function that can be used by all the drivers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
include/linux/soc/qcom/ubwc.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
index f052e241736c..50d891493ac8 100644
--- a/include/linux/soc/qcom/ubwc.h
+++ b/include/linux/soc/qcom/ubwc.h
@@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
return ret;
}
+static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
+{
+ return cfg->ubwc_enc_version == UBWC_1_0 &&
+ (cfg->ubwc_dec_version == UBWC_2_0 ||
+ cfg->ubwc_dec_version == UBWC_3_0);
+}
+
#endif /* __QCOM_UBWC_H__ */
--
2.47.3
On Sat, Jan 10, 2026 at 09:37:54PM +0200, Dmitry Baryshkov wrote:
> MDSS and GPU drivers use different approaches to get min_acc length.
> Add helper function that can be used by all the drivers.
>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Regards,
Bjorn
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> include/linux/soc/qcom/ubwc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> index f052e241736c..50d891493ac8 100644
> --- a/include/linux/soc/qcom/ubwc.h
> +++ b/include/linux/soc/qcom/ubwc.h
> @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
> return ret;
> }
>
> +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
> +{
> + return cfg->ubwc_enc_version == UBWC_1_0 &&
> + (cfg->ubwc_dec_version == UBWC_2_0 ||
> + cfg->ubwc_dec_version == UBWC_3_0);
> +}
> +
> #endif /* __QCOM_UBWC_H__ */
>
> --
> 2.47.3
>
On 1/10/26 8:37 PM, Dmitry Baryshkov wrote:
> MDSS and GPU drivers use different approaches to get min_acc length.
> Add helper function that can be used by all the drivers.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> include/linux/soc/qcom/ubwc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> index f052e241736c..50d891493ac8 100644
> --- a/include/linux/soc/qcom/ubwc.h
> +++ b/include/linux/soc/qcom/ubwc.h
> @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
> return ret;
> }
>
> +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
> +{
> + return cfg->ubwc_enc_version == UBWC_1_0 &&
> + (cfg->ubwc_dec_version == UBWC_2_0 ||
> + cfg->ubwc_dec_version == UBWC_3_0);
Are you sure this is a correct heuristic?
Konrad
On Mon, Jan 12, 2026 at 12:08:13PM +0100, Konrad Dybcio wrote:
> On 1/10/26 8:37 PM, Dmitry Baryshkov wrote:
> > MDSS and GPU drivers use different approaches to get min_acc length.
> > Add helper function that can be used by all the drivers.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
> > include/linux/soc/qcom/ubwc.h | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> > index f052e241736c..50d891493ac8 100644
> > --- a/include/linux/soc/qcom/ubwc.h
> > +++ b/include/linux/soc/qcom/ubwc.h
> > @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
> > return ret;
> > }
> >
> > +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
> > +{
> > + return cfg->ubwc_enc_version == UBWC_1_0 &&
> > + (cfg->ubwc_dec_version == UBWC_2_0 ||
> > + cfg->ubwc_dec_version == UBWC_3_0);
>
> Are you sure this is a correct heuristic?
No, but it matches what we had in MDSS driver (and I think it matches
the chipsets that were selected by the GPU driver).
--
With best wishes
Dmitry
On 1/13/26 1:24 AM, Dmitry Baryshkov wrote:
> On Mon, Jan 12, 2026 at 12:08:13PM +0100, Konrad Dybcio wrote:
>> On 1/10/26 8:37 PM, Dmitry Baryshkov wrote:
>>> MDSS and GPU drivers use different approaches to get min_acc length.
>>> Add helper function that can be used by all the drivers.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>> ---
>>> include/linux/soc/qcom/ubwc.h | 7 +++++++
>>> 1 file changed, 7 insertions(+)
>>>
>>> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
>>> index f052e241736c..50d891493ac8 100644
>>> --- a/include/linux/soc/qcom/ubwc.h
>>> +++ b/include/linux/soc/qcom/ubwc.h
>>> @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
>>> return ret;
>>> }
>>>
>>> +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
>>> +{
>>> + return cfg->ubwc_enc_version == UBWC_1_0 &&
>>> + (cfg->ubwc_dec_version == UBWC_2_0 ||
>>> + cfg->ubwc_dec_version == UBWC_3_0);
>>
>> Are you sure this is a correct heuristic?
>
> No, but it matches what we had in MDSS driver (and I think it matches
> the chipsets that were selected by the GPU driver).
Should we keep a comment that this is a best guess that worked out so
far?
Konrad
On Tue, Jan 13, 2026 at 04:26:50PM +0100, Konrad Dybcio wrote:
> On 1/13/26 1:24 AM, Dmitry Baryshkov wrote:
> > On Mon, Jan 12, 2026 at 12:08:13PM +0100, Konrad Dybcio wrote:
> >> On 1/10/26 8:37 PM, Dmitry Baryshkov wrote:
> >>> MDSS and GPU drivers use different approaches to get min_acc length.
> >>> Add helper function that can be used by all the drivers.
> >>>
> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> >>> ---
> >>> include/linux/soc/qcom/ubwc.h | 7 +++++++
> >>> 1 file changed, 7 insertions(+)
> >>>
> >>> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> >>> index f052e241736c..50d891493ac8 100644
> >>> --- a/include/linux/soc/qcom/ubwc.h
> >>> +++ b/include/linux/soc/qcom/ubwc.h
> >>> @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
> >>> return ret;
> >>> }
> >>>
> >>> +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
> >>> +{
> >>> + return cfg->ubwc_enc_version == UBWC_1_0 &&
> >>> + (cfg->ubwc_dec_version == UBWC_2_0 ||
> >>> + cfg->ubwc_dec_version == UBWC_3_0);
> >>
> >> Are you sure this is a correct heuristic?
> >
> > No, but it matches what we had in MDSS driver (and I think it matches
> > the chipsets that were selected by the GPU driver).
>
> Should we keep a comment that this is a best guess that worked out so
> far?
Sure.
--
With best wishes
Dmitry
On 10/01/2026 19:37, Dmitry Baryshkov wrote:
> MDSS and GPU drivers use different approaches to get min_acc length.
> Add helper function that can be used by all the drivers.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> include/linux/soc/qcom/ubwc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> index f052e241736c..50d891493ac8 100644
> --- a/include/linux/soc/qcom/ubwc.h
> +++ b/include/linux/soc/qcom/ubwc.h
> @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
> return ret;
> }
>
> +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
> +{
> + return cfg->ubwc_enc_version == UBWC_1_0 &&
> + (cfg->ubwc_dec_version == UBWC_2_0 ||
> + cfg->ubwc_dec_version == UBWC_3_0);
> +}
> +
> #endif /* __QCOM_UBWC_H__ */
>
> --
> 2.47.3
>
>
Why not have this function return either 64 if the above is true or 32
if not, then rename to qcom_ubwc_min_acc_length() ?
You could imagine some function SoC having a 128b length for argument's
sake, it would make more sense just to modify this function then instead
of all of the callsites.
---
bod
On Sun, Jan 11, 2026 at 09:05:35PM +0000, Bryan O'Donoghue wrote:
> On 10/01/2026 19:37, Dmitry Baryshkov wrote:
> > MDSS and GPU drivers use different approaches to get min_acc length.
> > Add helper function that can be used by all the drivers.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
> > include/linux/soc/qcom/ubwc.h | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> > index f052e241736c..50d891493ac8 100644
> > --- a/include/linux/soc/qcom/ubwc.h
> > +++ b/include/linux/soc/qcom/ubwc.h
> > @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
> > return ret;
> > }
> >
> > +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
> > +{
> > + return cfg->ubwc_enc_version == UBWC_1_0 &&
> > + (cfg->ubwc_dec_version == UBWC_2_0 ||
> > + cfg->ubwc_dec_version == UBWC_3_0);
> > +}
> > +
> > #endif /* __QCOM_UBWC_H__ */
> >
> > --
> > 2.47.3
> >
> >
>
> Why not have this function return either 64 if the above is true or 32 if
> not, then rename to qcom_ubwc_min_acc_length() ?
See, how it's used. We have several callsites which pass 0 / 1 depending
on MAL being 32 or 64.
>
> You could imagine some function SoC having a 128b length for argument's
> sake, it would make more sense just to modify this function then instead of
> all of the callsites.
It would require changes to the drivers code anyway as they would now
have to cope with updated register maps / values.
--
With best wishes
Dmitry
On 10/01/2026 19:37, Dmitry Baryshkov wrote:
> MDSS and GPU drivers use different approaches to get min_acc length.
> Add helper function that can be used by all the drivers.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> include/linux/soc/qcom/ubwc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> index f052e241736c..50d891493ac8 100644
> --- a/include/linux/soc/qcom/ubwc.h
> +++ b/include/linux/soc/qcom/ubwc.h
> @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
> return ret;
> }
>
> +static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
> +{
> + return cfg->ubwc_enc_version == UBWC_1_0 &&
> + (cfg->ubwc_dec_version == UBWC_2_0 ||
> + cfg->ubwc_dec_version == UBWC_3_0);
> +}
> +
Does that indentation pass checkpatch ?
I assume so but, please check.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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