The WCSS remoteproc is typically used by ath11k to load wifi firmware
to the Hexagon q6 procesor. Add the nodes required to bring up this
processor.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 101 ++++++++++++++++++++++++++
1 file changed, 101 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 86c9cb9fffc9..56e6f1370d6c 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -226,6 +226,37 @@ smem@4aa00000 {
hwlocks = <&tcsr_mutex 3>;
no-map;
};
+
+
+ q6_region: wcnss@4ab00000 {
+ no-map;
+ reg = <0x0 0x4ab00000 0x0 0x02b00000>;
+ };
+ };
+
+ wcss: smp2p-wcss {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_SPI 322 IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&apcs_glb 9>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ wcss_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ qcom,smp2p-feature-ssr-ack;
+ #qcom,smem-state-cells = <1>;
+ };
+
+ wcss_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
};
soc: soc@0 {
@@ -903,6 +934,76 @@ frame@b128000 {
};
};
+ q6v5_wcss: remoteproc@cd00000 {
+ compatible = "qcom,ipq9574-wcss-pil";
+ reg = <0x0cd00000 0x4040>,
+ <0x004ab000 0x20>;
+ reg-names = "qdsp6",
+ "rmb";
+
+ interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,
+ <&wcss_smp2p_in 0 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 1 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 2 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 3 IRQ_TYPE_NONE>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+ resets = <&gcc GCC_WCSSAON_RESET>,
+ <&gcc GCC_WCSS_BCR>,
+ <&gcc GCC_WCSS_Q6_BCR>;
+ reset-names = "wcss_aon_reset",
+ "wcss_reset",
+ "wcss_q6_reset";
+
+ clocks = <&gcc GCC_ANOC_WCSS_AXI_M_CLK>,
+ <&gcc GCC_Q6_AHB_CLK>,
+ <&gcc GCC_Q6_AHB_S_CLK>,
+ <&gcc GCC_Q6_AXIM_CLK>,
+ <&gcc GCC_Q6SS_BOOT_CLK>,
+ <&gcc GCC_MEM_NOC_Q6_AXI_CLK>,
+ <&gcc GCC_SYS_NOC_WCSS_AHB_CLK>,
+ <&gcc GCC_WCSS_ACMT_CLK>,
+ <&gcc GCC_WCSS_ECAHB_CLK>,
+ <&gcc GCC_WCSS_Q6_TBU_CLK>,
+ <&gcc GCC_WCSS_AHB_S_CLK>,
+ <&gcc GCC_Q6_AXIM2_CLK>,
+ <&gcc GCC_WCSS_AXI_M_CLK>;
+
+ clock-names = "anoc_wcss_axi_m",
+ "q6_ahb",
+ "q6_ahb_s",
+ "q6_axim",
+ "q6ss_boot",
+ "mem_noc_q6_axi",
+ "sys_noc_wcss_ahb",
+ "wcss_acmt",
+ "wcss_ecahb",
+ "wcss_q6_tbu",
+ "q6_axim2",
+ "wcss_ahb_s",
+ "wcss_axi_m";
+
+ qcom,halt-regs = <&tcsr 0x18000 0x1b000 0xe000>;
+
+ qcom,smem-states = <&wcss_smp2p_out 0>,
+ <&wcss_smp2p_out 1>;
+ qcom,smem-state-names = "shutdown",
+ "stop";
+
+ memory-region = <&q6_region>;
+
+ glink-edge {
+ interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
+ label = "rtr";
+ qcom,remote-pid = <1>;
+ mboxes = <&apcs_glb 8>;
+ };
+ };
+
pcie1: pcie@10000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x10000000 0xf1d>,
--
2.45.1