[PATCH 00/11] bus: add stm32 debug bus and coresight support for stm32mp1x platforms

Gatien Chevallier posted 11 patches 3 months, 1 week ago
There is a newer version of this series
.../devicetree/bindings/arm/arm,coresight-cti.yaml |   3 +
.../devicetree/bindings/arm/arm,coresight-etm.yaml |   3 +
.../devicetree/bindings/arm/arm,coresight-tmc.yaml |   3 +
.../bindings/arm/arm,coresight-tpiu.yaml           |   3 +
.../bindings/bus/st,stm32mp131-dbg-bus.yaml        |  86 +++++++
.../devicetree/bindings/pinctrl/st,stm32-hdp.yaml  |   4 +
MAINTAINERS                                        |   1 +
arch/arm/boot/dts/st/stm32mp131.dtsi               | 119 +++++++++
arch/arm/boot/dts/st/stm32mp135f-dk.dts            |  24 ++
arch/arm/boot/dts/st/stm32mp151.dtsi               | 173 +++++++++++++
arch/arm/boot/dts/st/stm32mp153.dtsi               |  68 +++++
arch/arm/boot/dts/st/stm32mp157c-ev1.dts           |  40 +++
arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi          |  40 +++
drivers/bus/Kconfig                                |  10 +
drivers/bus/Makefile                               |   1 +
drivers/bus/stm32_dbg_bus.c                        | 285 +++++++++++++++++++++
drivers/bus/stm32_firewall.c                       |   2 +-
drivers/pinctrl/stm32/pinctrl-stm32-hdp.c          |  41 +++
18 files changed, 905 insertions(+), 1 deletion(-)
[PATCH 00/11] bus: add stm32 debug bus and coresight support for stm32mp1x platforms
Posted by Gatien Chevallier 3 months, 1 week ago
Stm32 SoCs embed debug peripherals such as Coresight. These peripherals
can monitor the activity of the cores. Because of that, they can be
used only if some features in the debug configuration are enabled.
Else, errors or firewall exceptions can be observed. Similarly to
the ETZPC(on stm32mp1x platforms) or the RIFSC(on stm32mp2x platforms),
debug-related peripherals access can be assessed at bus level to
prevent these issues from happening.

The debug configuration can only be accessed by the secure world.
That means that a service must be implemented in the secure world for
the kernel to check the firewall configuration. On OpenSTLinux, it is
done through a Debug access PTA in OP-TEE [1].
To represent the debug peripherals present on a dedicated debug bus,
create a debug bus node in the device tree and the associated driver
that will interact with this PTA.

[1]: https://github.com/OP-TEE/optee_os/pull/7673

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
---
Gatien Chevallier (11):
      dt-bindings: document access-controllers property for coresight peripherals
      dt-bindings: pinctrl: document access-controllers property for stm32 HDP
      dt-bindings: bus: document the stm32 debug bus
      bus: stm32_firewall: allow check on different firewall controllers
      drivers: bus: add the stm32 debug bus driver
      arm: dts: stm32: introduce the debug bus for stm32mp1x platforms
      arm: dts: stm32: enable the debug bus on stm32mp1x boards
      arm: dts: stm32: enable CoreSight on stm32mp15xx-dkx boards
      arm: dts: stm32: enable CoreSight on the stm32mp157c-ev1 board
      arm: dts: stm32: enable CoreSight on the stm32mp135f-dk board
      pinctrl: stm32: add firewall checks before probing the HDP driver

 .../devicetree/bindings/arm/arm,coresight-cti.yaml |   3 +
 .../devicetree/bindings/arm/arm,coresight-etm.yaml |   3 +
 .../devicetree/bindings/arm/arm,coresight-tmc.yaml |   3 +
 .../bindings/arm/arm,coresight-tpiu.yaml           |   3 +
 .../bindings/bus/st,stm32mp131-dbg-bus.yaml        |  86 +++++++
 .../devicetree/bindings/pinctrl/st,stm32-hdp.yaml  |   4 +
 MAINTAINERS                                        |   1 +
 arch/arm/boot/dts/st/stm32mp131.dtsi               | 119 +++++++++
 arch/arm/boot/dts/st/stm32mp135f-dk.dts            |  24 ++
 arch/arm/boot/dts/st/stm32mp151.dtsi               | 173 +++++++++++++
 arch/arm/boot/dts/st/stm32mp153.dtsi               |  68 +++++
 arch/arm/boot/dts/st/stm32mp157c-ev1.dts           |  40 +++
 arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi          |  40 +++
 drivers/bus/Kconfig                                |  10 +
 drivers/bus/Makefile                               |   1 +
 drivers/bus/stm32_dbg_bus.c                        | 285 +++++++++++++++++++++
 drivers/bus/stm32_firewall.c                       |   2 +-
 drivers/pinctrl/stm32/pinctrl-stm32-hdp.c          |  41 +++
 18 files changed, 905 insertions(+), 1 deletion(-)
---
base-commit: 9ace4753a5202b02191d54e9fdf7f9e3d02b85eb
change-id: 20260108-debug_bus-392666c7a3aa

Best regards,
-- 
Gatien Chevallier <gatien.chevallier@foss.st.com>
Re: [PATCH 00/11] bus: add stm32 debug bus and coresight support for stm32mp1x platforms
Posted by Rob Herring 3 months ago
On Fri, 09 Jan 2026 11:55:00 +0100, Gatien Chevallier wrote:
> Stm32 SoCs embed debug peripherals such as Coresight. These peripherals
> can monitor the activity of the cores. Because of that, they can be
> used only if some features in the debug configuration are enabled.
> Else, errors or firewall exceptions can be observed. Similarly to
> the ETZPC(on stm32mp1x platforms) or the RIFSC(on stm32mp2x platforms),
> debug-related peripherals access can be assessed at bus level to
> prevent these issues from happening.
> 
> The debug configuration can only be accessed by the secure world.
> That means that a service must be implemented in the secure world for
> the kernel to check the firewall configuration. On OpenSTLinux, it is
> done through a Debug access PTA in OP-TEE [1].
> To represent the debug peripherals present on a dedicated debug bus,
> create a debug bus node in the device tree and the associated driver
> that will interact with this PTA.
> 
> [1]: https://github.com/OP-TEE/optee_os/pull/7673
> 
> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
> ---
> Gatien Chevallier (11):
>       dt-bindings: document access-controllers property for coresight peripherals
>       dt-bindings: pinctrl: document access-controllers property for stm32 HDP
>       dt-bindings: bus: document the stm32 debug bus
>       bus: stm32_firewall: allow check on different firewall controllers
>       drivers: bus: add the stm32 debug bus driver
>       arm: dts: stm32: introduce the debug bus for stm32mp1x platforms
>       arm: dts: stm32: enable the debug bus on stm32mp1x boards
>       arm: dts: stm32: enable CoreSight on stm32mp15xx-dkx boards
>       arm: dts: stm32: enable CoreSight on the stm32mp157c-ev1 board
>       arm: dts: stm32: enable CoreSight on the stm32mp135f-dk board
>       pinctrl: stm32: add firewall checks before probing the HDP driver
> 
>  .../devicetree/bindings/arm/arm,coresight-cti.yaml |   3 +
>  .../devicetree/bindings/arm/arm,coresight-etm.yaml |   3 +
>  .../devicetree/bindings/arm/arm,coresight-tmc.yaml |   3 +
>  .../bindings/arm/arm,coresight-tpiu.yaml           |   3 +
>  .../bindings/bus/st,stm32mp131-dbg-bus.yaml        |  86 +++++++
>  .../devicetree/bindings/pinctrl/st,stm32-hdp.yaml  |   4 +
>  MAINTAINERS                                        |   1 +
>  arch/arm/boot/dts/st/stm32mp131.dtsi               | 119 +++++++++
>  arch/arm/boot/dts/st/stm32mp135f-dk.dts            |  24 ++
>  arch/arm/boot/dts/st/stm32mp151.dtsi               | 173 +++++++++++++
>  arch/arm/boot/dts/st/stm32mp153.dtsi               |  68 +++++
>  arch/arm/boot/dts/st/stm32mp157c-ev1.dts           |  40 +++
>  arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi          |  40 +++
>  drivers/bus/Kconfig                                |  10 +
>  drivers/bus/Makefile                               |   1 +
>  drivers/bus/stm32_dbg_bus.c                        | 285 +++++++++++++++++++++
>  drivers/bus/stm32_firewall.c                       |   2 +-
>  drivers/pinctrl/stm32/pinctrl-stm32-hdp.c          |  41 +++
>  18 files changed, 905 insertions(+), 1 deletion(-)
> ---
> base-commit: 9ace4753a5202b02191d54e9fdf7f9e3d02b85eb
> change-id: 20260108-debug_bus-392666c7a3aa
> 
> Best regards,
> --
> Gatien Chevallier <gatien.chevallier@foss.st.com>
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


This patch series was applied (using b4) to base:
 Base: 9ace4753a5202b02191d54e9fdf7f9e3d02b85eb (use --merge-base to override)

If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)

New warnings running 'make CHECK_DTBS=y for arch/arm/boot/dts/st/' for 20260109-debug_bus-v1-0-8f2142b5a738@foss.st.com:

arch/arm/boot/dts/st/stm32mp157c-dk2.dtb: funnel@50091000 (arm,coresight-dynamic-funnel): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml
arch/arm/boot/dts/st/stm32mp157c-ev1.dtb: funnel@50091000 (arm,coresight-dynamic-funnel): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml
arch/arm/boot/dts/st/stm32mp157c-dk2.dtb: stm@500a0000 (arm,coresight-stm): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml
arch/arm/boot/dts/st/stm32mp157c-ev1.dtb: stm@500a0000 (arm,coresight-stm): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml
arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dtb: funnel@50091000 (arm,coresight-dynamic-funnel): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml
arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dtb: stm@500a0000 (arm,coresight-stm): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml
arch/arm/boot/dts/st/stm32mp157a-dk1.dtb: funnel@50091000 (arm,coresight-dynamic-funnel): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml
arch/arm/boot/dts/st/stm32mp157a-dk1.dtb: stm@500a0000 (arm,coresight-stm): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml
arch/arm/boot/dts/st/stm32mp157f-dk2.dtb: funnel@50091000 (arm,coresight-dynamic-funnel): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml
arch/arm/boot/dts/st/stm32mp157f-dk2.dtb: stm@500a0000 (arm,coresight-stm): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml
arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dtb: funnel@50091000 (arm,coresight-dynamic-funnel): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml
arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dtb: stm@500a0000 (arm,coresight-stm): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml
arch/arm/boot/dts/st/stm32mp157a-iot-box.dtb: serial@40010000 (st,stm32h7-uart): False schema does not allow [[44, 15, 1]]
	from schema $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml
arch/arm/boot/dts/st/stm32mp157a-iot-box.dtb: serial@40010000 (st,stm32h7-uart): False schema does not allow [[45, 0, 1]]
	from schema $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml
arch/arm/boot/dts/st/stm32mp157a-iot-box.dtb: serial@40010000 (st,stm32h7-uart): False schema does not allow [[44, 15, 1]]
	from schema $id: http://devicetree.org/schemas/serial/serial.yaml
arch/arm/boot/dts/st/stm32mp157a-iot-box.dtb: serial@40010000 (st,stm32h7-uart): False schema does not allow [[45, 0, 1]]
	from schema $id: http://devicetree.org/schemas/serial/serial.yaml
arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dtb: funnel@50091000 (arm,coresight-dynamic-funnel): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml
arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dtb: stm@500a0000 (arm,coresight-stm): Unevaluated properties are not allowed ('access-controllers' was unexpected)
	from schema $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml
Re: [PATCH 00/11] bus: add stm32 debug bus and coresight support for stm32mp1x platforms
Posted by Linus Walleij 3 months, 1 week ago
Hi Gatien,

thanks for your patch series!

On Fri, Jan 9, 2026 at 11:56 AM Gatien Chevallier
<gatien.chevallier@foss.st.com> wrote:

> Stm32 SoCs embed debug peripherals such as Coresight. These peripherals
> can monitor the activity of the cores. Because of that, they can be
> used only if some features in the debug configuration are enabled.
> Else, errors or firewall exceptions can be observed. Similarly to
> the ETZPC(on stm32mp1x platforms) or the RIFSC(on stm32mp2x platforms),
> debug-related peripherals access can be assessed at bus level to
> prevent these issues from happening.
>
> The debug configuration can only be accessed by the secure world.
> That means that a service must be implemented in the secure world for
> the kernel to check the firewall configuration. On OpenSTLinux, it is
> done through a Debug access PTA in OP-TEE [1].
> To represent the debug peripherals present on a dedicated debug bus,
> create a debug bus node in the device tree and the associated driver
> that will interact with this PTA.
>
> [1]: https://github.com/OP-TEE/optee_os/pull/7673
>
> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

I think Jens Wiklander wants to have a look at this partch
series, so added him to the To:.

Yours,
Linus Walleij
Re: [PATCH 00/11] bus: add stm32 debug bus and coresight support for stm32mp1x platforms
Posted by Gatien CHEVALLIER 3 months ago

On 1/10/26 00:10, Linus Walleij wrote:
> Hi Gatien,
> 
> thanks for your patch series!
> 
> On Fri, Jan 9, 2026 at 11:56 AM Gatien Chevallier
> <gatien.chevallier@foss.st.com> wrote:
> 
>> Stm32 SoCs embed debug peripherals such as Coresight. These peripherals
>> can monitor the activity of the cores. Because of that, they can be
>> used only if some features in the debug configuration are enabled.
>> Else, errors or firewall exceptions can be observed. Similarly to
>> the ETZPC(on stm32mp1x platforms) or the RIFSC(on stm32mp2x platforms),
>> debug-related peripherals access can be assessed at bus level to
>> prevent these issues from happening.
>>
>> The debug configuration can only be accessed by the secure world.
>> That means that a service must be implemented in the secure world for
>> the kernel to check the firewall configuration. On OpenSTLinux, it is
>> done through a Debug access PTA in OP-TEE [1].
>> To represent the debug peripherals present on a dedicated debug bus,
>> create a debug bus node in the device tree and the associated driver
>> that will interact with this PTA.
>>
>> [1]: https://github.com/OP-TEE/optee_os/pull/7673
>>
>> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
> 
> I think Jens Wiklander wants to have a look at this partch
> series, so added him to the To:.
> 
> Yours,
> Linus Walleij

Hi Linus,

Sure, I'll keep the To. addition for V2, thank you.

Best regards,
Gatien