We currently print a warning message that the IO memory size is not
compatible with automatic clock gating for many Exynos-based boards,
including legacy ones, even if not requested to enable automatic clock
gating in the first place.
Change the test in question to avoid that warning.
Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Closes: https://lore.kernel.org/all/8b2c412d-3e1e-4be0-a9d5-ef67f6f0d409@samsung.com/
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
drivers/clk/samsung/clk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 06ea5deef4ee2ffb87dcd14102561886ea80b7bc..417ec1786b5e77e17dda4022b417c1c6b79c59ab 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -462,7 +462,7 @@ void __init samsung_cmu_register_clocks(struct samsung_clk_provider *ctx,
const struct samsung_cmu_info *cmu,
struct device_node *np)
{
- if (samsung_is_auto_capable(np) && cmu->auto_clock_gate)
+ if (cmu->auto_clock_gate && samsung_is_auto_capable(np))
ctx->auto_clock_gate = cmu->auto_clock_gate;
ctx->gate_dbg_offset = cmu->gate_dbg_offset;
--
2.52.0.457.g6b5491de43-goog