[PATCH v2 0/3] pinctrl: spacemit: support I/O power domain configuration

Troy Mitchell posted 3 patches 1 month ago
.../bindings/pinctrl/spacemit,k1-pinctrl.yaml      |   5 +
arch/riscv/boot/dts/spacemit/k1.dtsi               |   3 +-
drivers/pinctrl/spacemit/pinctrl-k1.c              | 129 ++++++++++++++++++++-
3 files changed, 133 insertions(+), 4 deletions(-)
[PATCH v2 0/3] pinctrl: spacemit: support I/O power domain configuration
Posted by Troy Mitchell 1 month ago
This series adds support for configuring IO power domain voltage for
dual-voltage GPIO banks on the Spacemit K1 SoC.

On K1, IO domain power control registers determine whether a GPIO bank
operates at 1.8V or 3.3V. These registers default to 3.3V operation,
which may lead to functional failures when GPIO banks are externally
supplied with 1.8V but internally remain configured for 3.3V.

The IO power domain registers are implemented as secure registers and
require an explicit unlock sequence via the AIB Secure Access Register
(ASAR), located in the APBC register space.

This series ensures that pin voltage configuration correctly reflects
hardware requirements.

Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
---
Troy Mitchell (3):
      dt-bindings: pinctrl: spacemit: add syscon property
      pinctrl: spacemit: support I/O power domain configuration
      riscv: dts: spacemit: modify pinctrl node in dtsi

 .../bindings/pinctrl/spacemit,k1-pinctrl.yaml      |   5 +
 arch/riscv/boot/dts/spacemit/k1.dtsi               |   3 +-
 drivers/pinctrl/spacemit/pinctrl-k1.c              | 129 ++++++++++++++++++++-
 3 files changed, 133 insertions(+), 4 deletions(-)
---
base-commit: 168d19e604855cfa6024e9854f8ea9b1c8efa2d9
change-id: 20251223-kx-pinctrl-aib-io-pwr-domain-b02da255f95c

Best regards,
-- 
Troy Mitchell <troy.mitchell@linux.spacemit.com>
Re: [PATCH v2 0/3] pinctrl: spacemit: support I/O power domain configuration
Posted by Linus Walleij 2 weeks, 5 days ago
On Thu, Jan 8, 2026 at 7:43 AM Troy Mitchell
<troy.mitchell@linux.spacemit.com> wrote:

> This series adds support for configuring IO power domain voltage for
> dual-voltage GPIO banks on the Spacemit K1 SoC.
>
> On K1, IO domain power control registers determine whether a GPIO bank
> operates at 1.8V or 3.3V. These registers default to 3.3V operation,
> which may lead to functional failures when GPIO banks are externally
> supplied with 1.8V but internally remain configured for 3.3V.
>
> The IO power domain registers are implemented as secure registers and
> require an explicit unlock sequence via the AIB Secure Access Register
> (ASAR), located in the APBC register space.
>
> This series ensures that pin voltage configuration correctly reflects
> hardware requirements.
>
> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>

Excellent work in this patch series Troy!

> Troy Mitchell (3):
>       dt-bindings: pinctrl: spacemit: add syscon property
>       pinctrl: spacemit: support I/O power domain configuration

These two patches applied to the pin control tree.

>       riscv: dts: spacemit: modify pinctrl node in dtsi

Please funnel this one through the SoC tree.

Yours,
Linus Walleij
Re: [PATCH v2 0/3] pinctrl: spacemit: support I/O power domain configuration
Posted by Yixun Lan 2 weeks, 5 days ago
Hi Linus,

On 00:52 Tue 20 Jan     , Linus Walleij wrote:
> On Thu, Jan 8, 2026 at 7:43 AM Troy Mitchell
> <troy.mitchell@linux.spacemit.com> wrote:
> 
> > This series adds support for configuring IO power domain voltage for
> > dual-voltage GPIO banks on the Spacemit K1 SoC.
> >
> > On K1, IO domain power control registers determine whether a GPIO bank
> > operates at 1.8V or 3.3V. These registers default to 3.3V operation,
> > which may lead to functional failures when GPIO banks are externally
> > supplied with 1.8V but internally remain configured for 3.3V.
> >
> > The IO power domain registers are implemented as secure registers and
> > require an explicit unlock sequence via the AIB Secure Access Register
> > (ASAR), located in the APBC register space.
> >
> > This series ensures that pin voltage configuration correctly reflects
> > hardware requirements.
> >
> > Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> 
> Excellent work in this patch series Troy!
> 
> > Troy Mitchell (3):
> >       dt-bindings: pinctrl: spacemit: add syscon property
> >       pinctrl: spacemit: support I/O power domain configuration
> 
> These two patches applied to the pin control tree.
> 
> >       riscv: dts: spacemit: modify pinctrl node in dtsi
> 
> Please funnel this one through the SoC tree.
> 
Thanks, I will take care of this

> Yours,
> Linus Walleij
> 

-- 
Yixun Lan (dlan)
Re: (subset) [PATCH v2 0/3] pinctrl: spacemit: support I/O power domain configuration
Posted by Yixun Lan 2 weeks, 5 days ago
On Thu, 08 Jan 2026 14:42:37 +0800, Troy Mitchell wrote:
> This series adds support for configuring IO power domain voltage for
> dual-voltage GPIO banks on the Spacemit K1 SoC.
> 
> On K1, IO domain power control registers determine whether a GPIO bank
> operates at 1.8V or 3.3V. These registers default to 3.3V operation,
> which may lead to functional failures when GPIO banks are externally
> supplied with 1.8V but internally remain configured for 3.3V.
> 
> [...]

Applied, thanks!

[3/3] riscv: dts: spacemit: modify pinctrl node in dtsi
      https://github.com/spacemit-com/linux/commit/cf54626b0ecce137379d1a8f1e6f0fa5b36d0395

Best regards,
-- 
Yixun Lan <dlan@kernel.org>