[PATCH v2 0/2] pinctrl: qcom: Add SA8775P lpass-lpi

Mohammad Rafi Shaik posted 2 patches 1 month ago
.../qcom,sa8775p-lpass-lpi-pinctrl.yaml       | 112 +++++++++
drivers/pinctrl/qcom/Kconfig                  |  10 +
drivers/pinctrl/qcom/Makefile                 |   1 +
.../pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c  | 216 ++++++++++++++++++
4 files changed, 339 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-lpass-lpi-pinctrl.yaml
create mode 100644 drivers/pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c
[PATCH v2 0/2] pinctrl: qcom: Add SA8775P lpass-lpi
Posted by Mohammad Rafi Shaik 1 month ago
Add pin control support for Low Power Audio SubSystem (LPASS)
of Qualcomm SA8775P SoC.

changes in [v2]:
	- Fixed dt-binding errors reported by Krzysztof and Rob.
	- Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad.
	- Documented Monaco compatible as suggested by Konrad.
	- Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/

Mohammad Rafi Shaik (2):
  dt-bindings: pinctrl: qcom,sa8775p-lpass-lpi-pinctrl: Add SA8775P
    LPASS pinctrl
  pinctrl: qcom: sa8775p-lpass-lpi: Add SA8775P LPASS pinctrl

 .../qcom,sa8775p-lpass-lpi-pinctrl.yaml       | 112 +++++++++
 drivers/pinctrl/qcom/Kconfig                  |  10 +
 drivers/pinctrl/qcom/Makefile                 |   1 +
 .../pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c  | 216 ++++++++++++++++++
 4 files changed, 339 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-lpass-lpi-pinctrl.yaml
 create mode 100644 drivers/pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c


base-commit: f96074c6d01d8a5e9e2fccd0bba5f2ed654c1f2d
-- 
2.34.1